參數(shù)資料
型號: XPC860DPCZP50D4
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Family Hardware Specifications
中文描述: 32-BIT, 50 MHz, RISC PROCESSOR, PBGA357
封裝: PLASTIC, BGA-357
文件頁數(shù): 19/76頁
文件大?。?/td> 857K
代理商: XPC860DPCZP50D4
MOTOROLA
MPC860 Family Hardware Specifications
19
Bus Signal Timing
B33
CLKOUT falling edge to GPL
valid—as requested by control bit
GxT4 in the corresponding word in
UPM
1.50
6.00
1.50
6.00
1.50
6.00
1.50
6.00
ns
B33a CLKOUT rising edge to GPL
valid—as requested by control bit
GxT3 in the corresponding word in
UPM
7.58
14.33
6.25
13.00
5.00
11.75
3.80
10.54
ns
B34 A(0:31), BADDR(28:30), and D(0:31)
to CS valid—as requested by control
bit CST4 in the corresponding word in
UPM
5.58
4.25
3.00
1.79
ns
B34a A(0:31), BADDR(28:30), and D(0:31)
to CS valid—as requested by control
bit CST1 in the corresponding word in
UPM
13.15
10.50
8.00
5.58
ns
B34b A(0:31), BADDR(28:30), and D(0:31)
to CS valid—as requested by control
bit CST2 in the corresponding word in
UPM
20.73
16.75
13.00
9.36
ns
B35
A(0:31), BADDR(28:30) to CS
valid—as requested by control bit
BST4 in the corresponding word in
UPM
5.58
4.25
3.00
1.79
ns
B35a A(0:31), BADDR(28:30), and D(0:31)
to BS valid—as requested by control
bit BST1 in the corresponding word in
UPM
13.15
10.50
8.00
5.58
ns
B35b A(0:31), BADDR(28:30), and D(0:31)
to BS valid—as requested by control
bit BST2 in the corresponding word in
UPM
20.73
16.75
13.00
9.36
ns
B36
A(0:31), BADDR(28:30), and D(0:31)
to GPL valid—as requested by
control bit GxT4 in the corresponding
word in UPM
5.58
4.25
3.00
1.79
ns
B37
UPWAIT valid to CLKOUT falling
edge
9
6.00
6.00
6.00
6.00
ns
B38
CLKOUT falling edge to UPWAIT
valid
9
1.00
1.00
1.00
1.00
ns
B39
AS valid to CLKOUT rising edge
10
7.00
7.00
7.00
7.00
ns
B40
A(0:31), TSIZ(0:1), RD/WR, BURST,
valid to CLKOUT rising edge
7.00
7.00
7.00
7.00
ns
Table 9-6. Bus Operation Timings (continued)
Num
Characteristic
33 MHz
40 MHz
50 MHz
66 MHz
Unit
Min
Max
Min
Max
Min
Max
Min
Max
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