參數(shù)資料
型號： XE8801AMI000WP
廠商： Semtech
文件頁數(shù)： 95/135頁
文件大?。?/td> 0K
描述： SENSING MACHINE WITH 16 + 10 BIT
標(biāo)準(zhǔn)包裝： 558
系列： XE880x
應(yīng)用： 感測機(jī)
核心處理器： Coolrisc816?
程序存儲器類型： 閃存（22 kB）
控制器系列： XE8000
RAM 容量： 512 x 8
接口： UART，USRT
輸入/輸出數(shù)： 24
電源電壓： 2.4 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 模具
包裝： 托盤
配用： XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名稱： Q2722595
Semtech 2005
www.semtech.com
11-4
XE8801A – SX8801R
11.4 Interrupts and events map
Interrupt source
Default mapping in
the interrupt manager
Default mapping in the
event manager
pa_irqbus[5]
RegIrqMid[5]
pa_irqbus[4]
RegIrqMid[4]
pa_irqbus[1]
RegIrqMid[1]
RegEvn[4]
pa_irqbus[0]
RegIrqMid[0]
RegEvn[0]
pa_irqbus[7]
RegIrqLow[7]
pa_irqbus[6]
RegIrqLow[6]
pa_irqbus[3]
RegIrqLow[3]
pa_irqbus[2]
RegIrqLow[2]
11.5 Port A (PA) Operation
The Port A input status (debounced or not) can be read from RegPAin.
Debounce mode:
Each bit in Port A can be individually debounced by setting the corresponding bit in RegPADebounce. After reset,
the debounce function is disabled. After enabling the debouncer, the change of the input value is accepted only if
the input value is identical at two consecutive sampling on the rising edge of the selected clock. Selection of the
clock is done by the bit DebFast in Register RegSysMisc (see clock block documentation for more precision on
the frequency).
DebFast
Clock filter
0
256 Hz
1
8 kHz
Table 11-7: debounce frequency selection
Figure 11-2: digital debouncer
Pull-ups:
When the corresponding bit in RegPAPullup is set to 0, the inputs are floating (pull-up resistors are disconnected).
When the corresponding bit in RegPAPullup is set to 1, a pull-up resistor is connected to the input pin. Port A
starts up with the pull-up resistors disconnected.
Port A as an interrupt source:
Each Port A input is an interrupt request source and can be set on rising or falling edge with the corresponding bit
in RegPAEdge. After reset, the rising edge is selected for interrupt generation by default. The interrupt source can
be debounced by setting register RegPADebounce.
Note: care must be taken when modifying RegPAEdge because this register performs an edge selection. The
change of this register may result in a transition which may be interpreted as a valid interruption.
Input
CkDebounce
Debounced
112
1
12
Not
Recommended
for
New
Designs
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