參數(shù)資料
型號： XE8000EV120
廠商： Semtech
文件頁數(shù)： 90/108頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR SX8722I070TRLF
標準包裝： 1
系列： ZoomingADC™
ADC 的數(shù)量： 1
位數(shù)： 16
數(shù)據(jù)接口： I²C
工作溫度： -40°C ~ 125°C
已用 IC / 零件： SX8722
已供物品： 板，CD
產(chǎn)品目錄頁面： 585 (CN2011-ZH PDF)
相關產(chǎn)品： SX8722I070LFDKR-ND - IC ZOOMING ADC 10BIT 16CH 44MLPQ
SX8722I070LFCT-ND - IC ZOOMING ADC 10BIT 16CH 44MLPQ
SX8722I070LFTR-ND - IC ZOOMING ADC 10BIT 16CH 44MLPQ
其它名稱： XM8000EV120
XM8000EV120-ND
ACS - Revision 4.2
October 2008
2008 Semtech Corp.
www.semtech.com
Page 82
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
SX8722
High gain acquisition for sensor interface
14.2. Register description
The register descriptions are presented here in ascending order of Register Address. Some registers carry several individual
data fields of various sizes; from single-bit values (e.g. flags), upwards. Some data fields are spread across multiple
registers. Unused bits are 'don't care' and writing either 0 or 1 will not affect any function of the device. After power on reset
the registers will have the values indicated in the tables "Reset" column.
14.2.1. SX8722 general configuration
Table 60. SXCtrl1 (0x00)
Table 61. SXCtrl2 (0x01)
Bit
Bit Name
Mode
Reset
Description
7
EE_D
r
x
Indicates if an EEPROM was detected at startup
6
XTAL_D
r
x
Indicates if an XTAL was detected at startup
5
CKOUT
rw
0
Enabled the clock output on CKOUT pin
4
RESERVED
rw
0
3
EE
r
0
Is set to 1 when SX8722 loaded its configuration from the
EEPROM at startup.
2
SLEEP
rw
0
When set to 1 his bit activates the Sleep mode of the SX8722.
Setting pin SLEEP to 1 has the same effect.
1
SHUT
rw
0
When set to 1 his bit activates the Shutdown mode of the
SX8722. Setting pin SHUT to 1 has the same effect.
0
CAL
r
0
This flag shows if the SX8722 clock has been successfully
calibrated.
Bit
Bit name
Mode
Reset
Description
7:4
reserved
r
x
3
AL1OnC
rw
0
Sets the logical condition for alarm 1 on (0 = OR, 1 = AND)
2
AL1OffC
rw
0
Sets the logical condition for alarm 1 off (0 = OR, 1 = AND)
1
AL2OnC
rw
0
Sets the logical condition for alarm 2 on (0 = OR, 1 = AND)
0
AL2OffC
rw
0
Sets the logical condition for alarm 2 off (0 = OR, 1 = AND)
Bit
Name
Mode
Reset
Description
7:4
reserved
r
x
3
CONF4
rw
0
Configuration 4 enabling
2
CONF3
rw
0
Configuration 3 enabling
1
CONF2
rw
0
Configuration 2 enabling
Not
Recommended
for
New
Designs
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