- 您現(xiàn)在的位置：買賣IC網 > PDF目錄375007 > XCF32PVOG48 (Xilinx, Inc.) Platform Flash In-System Programmable Configuration PROMS PDF資料下載
參數(shù)資料
| 型號： | XCF32PVOG48 |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Platform Flash In-System Programmable Configuration PROMS |
| 中文描述： | 平臺Flash在系統(tǒng)可編程配置方案管理系統(tǒng) |
| 文件頁數(shù)： | 46/46頁 |
| 文件大小： | 525K |
| 代理商： | XCF32PVOG48 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當前第46頁
Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
46
R
12/29/05
2.8
Update to the first paragraph of
"IEEE 1149.1 Boundary-Scan (JTAG)," page 5
.
Added JTAG cautionary note to
Page 5
.
Corrected logic values for Erase/Program (ER/PROG) Status field, IR[4], listed under
"XCFxxP
Instruction Register (16 bits wide)," page 6
.
Sections
"XCFxxS and XCFxxP PROM as Configuration Slave with CLK Input Pin as Clock
Source," page 27
,
"XCFxxP PROM as Configuration Master with CLK Input Pin as Clock
Source," page 30
and
"XCFxxP PROM as Configuration Master with Internal Oscillator as Clock
Source," page 33
added to
"AC Characteristics Over Operating Conditions," page 27
.
Notes for
Figure 6, page 14
,
Figure 7, page 15
,
Figure 8, page 16
,
Figure 9, page 17
,
Figure 10,
page 18
,
Figure 11, page 19
,
Figure 12, page 20
, and
Figure 13, page 21
updated to specify the
need for a pull-up resistor if CF is not connected to PROGB.
Enhanced description under section
"CLKOUT," page 8
.
Enhanced description on design revision sampling under section
"Design Revisioning," page 9
.
Figure 4 and Figure 5 renamed to
Table 7, page 6
and
Table 8, page 6
respectively. All tables,
figures, and table and figure references renumber this point forward.
Value for
"ICCINT," page 26
updated from 5mA to 1mA for XCFxxP.
Block diagram in
Figure 2, page 2
updated to show clock source muxing and route clocking to all
functional blocks.
05/09/06
2.9
Added Virtex-5 LX support to
Table 2, page 3
.
"VIL"
maximum for 2.5V operation in
"Recommended Operating Conditions," page 25
updated
to match LVCMOS25 standard.
相關PDF資料 |
PDF描述 |
|---|---|
| XCF32PVOG48C | Platform Flash In-System Programmable Configuration PROMS |
| XCR22LV10-10SO24C | 20 characters x 2 Lines, 5x7 Dot Matric Character and Cursor |
| XCR22LV10-10SO24I | 20 characters x 2 Lines, 5x7 Dot Matric Character and Cursor |
| XCR22LV10 | TotalCMOS, Universal PLD Device |
| XCR22LV10-10PC28C | TotalCMOS, Universal PLD Device |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XCF32PVOG48C | 功能描述:IC PROM SRL 1.8V 32M GATE 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 - 用于 FPGA 的配置 Proms 系列:- 產品變化通告:Product Discontinuation 28/Jul/2010 標準包裝:98 系列:- 可編程類型:OTP 存儲容量:300kb 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-TSOP 包裝:管件 |
| XCF32PVOG48C0936 | 制造商:Xilinx 功能描述:XLXXCF32PVOG48C0936 PROM |
| XCF32PVOG48C4118 | 制造商:Xilinx 功能描述: |
| XCF3-81 | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Catalogue / XCF3-81 |
| XCF3-81-J1 | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Catalogue / XCF3-81-J1 |
發(fā)布緊急采購，3分鐘左右您將得到回復。