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參數(shù)資料
| 型號(hào)： | XC3S1000-4FG456I |
| 廠商： | XILINX INC |
| 元件分類(lèi)： | FPGA |
| 英文描述： | Spartan-3 FPGA Family : Complete Data Sheet |
| 中文描述： | FPGA, 1920 CLBS, 1000000 GATES, 630 MHz, PBGA456 |
| 封裝： | 23 X 23 MM, FBGA-456 |
| 文件頁(yè)數(shù)： | 2/192頁(yè) |
| 文件大?。?/td> | 1555K |
| 代理商： | XC3S1000-4FG456I |
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DS099-1 (v1.2) December 24, 2003
Advance Product Specification
www.xilinx.com
1-800-255-7778
1
2003 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm
.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Introduction
The Spartan-3 family of Field-Programmable Gate Arrays
is specifically designed to meet the needs of high volume,
cost-sensitive consumer electronic applications. The
eight-member family offers densities ranging from 50,000 to
five million system gates, as shown in
Table 1
.
The Spartan-3 family builds on the success of the earlier
Spartan-IIE family by increasing the amount of logic
resources, the capacity of internal RAM, the total number of
I/Os, and the overall level of performance as well as by
improving
clock
management
enhancements derive from state-of-the-art Virtex-II tech-
nology. These Spartan-3 enhancements, combined with
advanced process technology, deliver more functionality
and bandwidth per dollar than was previously possible, set-
ting new standards in the programmable logic industry.
Because of their exceptionally low cost, Spartan-3 FPGAs
are ideally suited to a wide range of consumer electronics
applications, including broadband access, home network-
ing, display/projection and digital television equipment.
The Spartan-3 family is a superior alternative to mask pro-
grammed ASICs. FPGAs avoid the high initial cost, the
lengthy development cycles, and the inherent inflexibility of
conventional ASICs. Also, FPGA programmability permits
design upgrades in the field with no hardware replacement
necessary, an impossibility with ASICs.
functions.
Numerous
Features
Revolutionary 90-nanometer process technology
Very low cost, high-performance logic solution for
high-volume, consumer-oriented applications
Table 1:
Summary of Spartan-3 FPGA Attributes
-
-
-
Densities as high as 74,880 logic cells
326 MHz system clock rate
Three power rails: for core (1.2V), I/Os (1.2V to
3.3V), and auxiliary purposes (2.5V)
SelectIO signaling
-
Up to 784 I/O pins
-
622 Mb/s data transfer rate per I/O
-
Seventeen single-ended signal standards
-
Seven differential signal standards including LVDS
-
Termination by Digitally Controlled Impedance
-
Signal swing ranging from 1.14V to 3.45V
-
Double Data Rate (DDR) support
Logic resources
-
Abundant logic cells with shift register capability
-
Wide multiplexers
-
Fast look-ahead carry logic
-
Dedicated 18 x 18 multipliers
-
JTAG logic compatible with IEEE 1149.1/1532
specifications
SelectRAM hierarchical memory
-
Up to 1,872 Kbits of total block RAM
-
Up to 520 Kbits of total distributed RAM
Digital Clock Manager (up to four DCMs)
-
Clock skew elimination
-
Frequency synthesis
-
High resolution phase shifting
Eight global clock lines and abundant routing
Fully supported by Xilinx ISE development system
-
Synthesis, mapping, placement and routing
MicroBlaze processor, PCI, and other cores
06
Spartan-3 FPGA Family:
Introduction and Ordering
Information
Advance Product Specification
DS099-1 (v1.2) December 24, 2003
0
0
R
Device
System
Gates
Logic
Cells
CLB Array
(One CLB = Four Slices)
Distributed
RAM (bits
1
)
Block RAM
(bits
1
)
Dedicated
Multipliers
DCMs
Maximum
User I/O
Maximum
Differential
I/O Pairs
Rows
Columns Total CLBs
XC3S50
50K
1,728
16
12
192
12K
72K
4
2
124
56
XC3S200
200K
4,320
24
20
480
30K
216K
12
4
173
76
XC3S400
400K
8,064
32
28
896
56K
288K
16
4
264
116
XC3S1000
1M
17,280
48
40
1,920
120K
432K
24
4
391
175
XC3S1500
1.5M
29,952
64
52
3,328
208K
576K
32
4
487
221
XC3S2000
2M
46,080
80
64
5,120
320K
720K
40
4
565
270
XC3S4000
4M
62,208
96
72
6,912
432K
1,728K
96
4
712
312
XC3S5000
5M
74,880
104
80
8,320
520K
1,872K
104
4
784
344
Notes:
1.
By convention, one Kb is equivalent to 1,024 bits.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC3S1000-4FG676C | Spartan-3 FPGA Family : Complete Data Sheet |
| XC3S1000-4FG676I | Spartan-3 FPGA Family : Complete Data Sheet |
| XC3S1000-4FG900C | Spartan-3 FPGA Family : Complete Data Sheet |
| XC3S1000-4FG900I | Spartan-3 FPGA Family : Complete Data Sheet |
| XC3S1000-4FT256C | Spartan-3 FPGA Family : Complete Data Sheet |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC3S10004FG676C | 制造商:Xilinx 功能描述: |
| XC3S1000-4FG676C | 制造商:Xilinx 功能描述:FPGA SPARTAN-3 1M GATES 17280 CELLS 630MHZ 1.2V 676FBGA - Trays 制造商:Xilinx 功能描述:SPARTAN-3A FPGA 1M 676-FBGA |
| XC3S1000-4FG676CES | 制造商:Xilinx 功能描述: |
| XC3S1000-4FG676I | 功能描述:IC FPGA SPARTAN 3 676FBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Spartan®-3 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門(mén)數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA（27x27） |
| XC3S1000-4FG900C | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan-3 FPGA Family : Complete Data Sheet |
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