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參數(shù)資料
| 型號： | XC3064L-8TQ144C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 23/76頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA 3.3V C-TEMP 144-TQFP |
| 產(chǎn)品變化通告： | XC3000(L) Discontinuation 01/Feb/2003 |
| 標準包裝： | 60 |
| 系列： | XC3000A/L |
| LAB/CLB數(shù)： | 224 |
| RAM 位總計： | 46064 |
| 輸入/輸出數(shù)： | 120 |
| 門數(shù)： | 4500 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-TQFP（20x20） |
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R
November 9, 1998 (Version 3.1)
7-5
XC3000 Series Field Programmable Gate Arrays
7
Improvements in the XC3000A and XC3000L
Families
The XC3000A and XC3000L families offer the following
enhancements over the popular XC3000 family:
The XC3000A and XC3000L families have additional inter-
connect resources to drive the I-inputs of TBUFs driving
horizontal Longlines. The CLB Clock Enable input can be
driven from a second vertical Longline. These two additions
result in more efficient and faster designs when horizontal
Longlines are used for data bussing.
During configuration, the XC3000A and XC3000L devices
check the bit-stream format for stop bits in the appropriate
positions. Any error terminates the configuration and pulls
INIT Low.
When the configuration process is finished and the device
starts up in user mode, the first activation of the outputs is
automatically slew-rate limited. This feature, called Soft
Startup, avoids the potential ground bounce when all
out-puts are turned on simultaneously. After start-up, the
slew rate of the individual outputs is, as in the XC3000 fam-
ily, determined by the individual configuration option.
Improvements in the XC3100A and XC3100L
Families
Based on a more advanced CMOS process, the XC3100A
and XC3100L families are architecturally-identical, perfor-
mance-optimized relatives of the XC3000A and XC3000L
families. While all families are footprint compatible, the
XC3100A family extends achievable system performance
beyond 85 MHz.
XC3100
XC3100A
(XC3195A)
Gate
Capacity
X7068
Functionality
XC3000L
XC3000A
XC3100L
Speed
Figure 1: XC3000 FPGA Families
Product Obsolete or Under Obsolescence
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC3064L-8TQ144I | 功能描述:IC FPGA 3.3V I-TEMP 144-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC3000A/L 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC3090 | 制造商:XILINX 制造商全稱:XILINX 功能描述:Logic Cell Array Families |
| XC3090-100CB164B | 制造商:Xilinx 功能描述: |
| XC3090-100CB164C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| XC3090-100CB164M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
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