參數(shù)資料
型號: XC2S50-6TQ144C
廠商: Xilinx Inc
文件頁數(shù): 60/99頁
文件大?。?/td> 0K
描述: IC FPGA 2.5V C-TEMP 144-TQFP
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-II
LAB/CLB數(shù): 384
邏輯元件/單元數(shù): 1728
RAM 位總計(jì): 32768
輸入/輸出數(shù): 92
門數(shù): 50000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
Spartan-II FPGA Family: DC and Switching Characteristics
DS001-3 (v2.8) June 13, 2008
Module 3 of 4
Product Specification
63
R
Figure 52: Period Tolerance and Clock Jitter
Period Tolerance: the allowed input clock period change in nanoseconds.
Output Jitter: the difference between an ideal
reference clock edge and the actual design.
TCLKIN + TIPTOL
_
DS001_52_090800
Actual Period
+
Jitter
+/- Jitter
+ Maximum
Phase Difference
Phase Offset and Maximum Phase Difference
+ Phase Offset
Ideal Period
1
FCLKIN
T
=
CLKIN
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