參數(shù)資料
型號: XC2S50-6TQ144C
廠商: Xilinx Inc
文件頁數(shù): 34/99頁
文件大?。?/td> 0K
描述: IC FPGA 2.5V C-TEMP 144-TQFP
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-II
LAB/CLB數(shù): 384
邏輯元件/單元數(shù): 1728
RAM 位總計: 32768
輸入/輸出數(shù): 92
門數(shù): 50000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
Spartan-II FPGA Family: Introduction and Ordering Information
DS001-1 (v2.8) June 13, 2008
Module 1 of 4
Product Specification
4
R
Spartan-II Product Availability
Table 2 shows the maximum user I/Os available on the device and the number of user I/Os available for each
device/package combination. The four global clock pins are usable as additional user I/Os when not used as a global clock
pin. These pins are not included in user I/O counts.
Table 2: Spartan-II FPGA User I/O Chart(1)
Device
Maximum
User I/O
Available User I/O According to Package Type
VQ100
VQG100
TQ144
TQG144
CS144
CSG144
PQ208
PQG208
FG256
FGG256
FG456
FGG456
XC2S15
86
60
86
(Note 2)
-
XC2S30
92
60
92
(Note 2)
-
XC2S50
176
-
92
-
140
176
-
XC2S100
176
-
92
-
140
176
(Note 2)
XC2S150
260
-
140
176
260
XC2S200
284
-
140
176
284
Notes:
1.
All user I/O counts do not include the four global clock/user input pins.
2.
Discontinued by PDN2004-01.
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