參數(shù)資料
型號: XC2S50-5FG256I
廠商: Xilinx Inc
文件頁數(shù): 79/99頁
文件大?。?/td> 0K
描述: IC FPGA 2.5V I-TEMP 256-FBGA
標準包裝: 90
系列: Spartan®-II
LAB/CLB數(shù): 384
邏輯元件/單元數(shù): 1728
RAM 位總計: 32768
輸入/輸出數(shù): 176
門數(shù): 50000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 256-BGA
供應商設備封裝: 256-FBGA(17x17)
Spartan-II FPGA Family: Pinout Tables
DS001-4 (v2.8) June 13, 2008
Module 4 of 4
Product Specification
80
R
I/O
0
-
D8
83
I/O
0
-
P188
A6
86
I/O, VREF
0
P12
P189
B7
89
GND
-
P190
GND*
-
I/O
0
-
P191
C8
92
I/O
0
-
P192
D7
95
I/O
0
-
P193
E7
98
I/O
0
P11
P194
C7
104
I/O
0
P10
P195
B6
107
VCCINT
-
P9
P196
VCCINT*-
VCCO
0
-
P197
VCCO
Bank 0*
-
GND
-
P8
P198
GND*
-
I/O
0
P7
P199
A5
110
I/O
0
P6
P200
C6
113
I/O
0
-
P201
B5
116
I/O
0
-
D6
119
I/O
0
-
P202
A4
122
I/O, VREF
0
P5
P203
B4
125
GND
-
GND*
-
I/O
0
-
P204
E6
128
I/O
0
-
D5
131
I/O
0
P4
P205
A3
134
I/O
0
-
C5
137
I/O
0
P3
P206
B3
140
TCK
-
P2
P207
C4
-
VCCO
0
P1
P208
VCCO
Bank 0*
-
VCCO
7
P144
P208
VCCO
Bank 7*
-
04/18/01
Notes:
1.
IRDY and TRDY can only be accessed when using Xilinx PCI
cores.
2.
Pads labelled GND*, VCCINT*, VCCO Bank 0*, VCCO Bank 1*,
VCCO Bank 2*, VCCO Bank 3*, VCCO Bank 4*, VCCO Bank 5*,
VCCO Bank 6*, VCCO Bank 7* are internally bonded to
independent ground or power planes within the package.
3.
See "VCCO Banks" for details on VCCO banking.
XC2S50 Device Pinouts (Continued)
XC2S50 Pad Name
TQ144
PQ208
FG256
Bndry
Scan
Function
Bank
Additional XC2S50 Package Pins
TQ144
Not Connected Pins
P104
P105
-
11/02/00
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