參數(shù)資料
型號： XC2S200-6PQG208C
廠商： Xilinx Inc
文件頁數(shù)： 46/99頁
文件大?。?/td> 0K
描述： IC SPARTAN-II FPGA 200K 208-PQFP
標準包裝： 24
系列： Spartan®-II
LAB/CLB數(shù)： 1176
邏輯元件/單元數(shù)： 5292
RAM 位總計： 57344
輸入/輸出數(shù)： 140
門數(shù)： 200000
電源電壓： 2.375 V ~ 2.625 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-PQFP（28x28）
產(chǎn)品目錄頁面： 599 (CN2011-ZH PDF)
其它名稱： 122-1317
Spartan-II FPGA Family: Functional Description
DS001-2 (v2.8) June 13, 2008
Module 2 of 4
Product Specification
50
R
Revision History
Date
Version
Description
09/18/00
2.0
Sectioned the Spartan-II Family data sheet into four modules. Corrected banking description.
03/05/01
2.1
Clarified guidelines for applying power to VCCINT and VCCO
09/03/03
2.2
The following changes were made:
"Serial Modes," page 20 cautions about toggling WRITE during serial configuration.
Maximum VIH values in Table 32 and Table 33 changed to 5.5V.
In "Boundary Scan," page 13, removed sentence about lack of INTEST support.
In Table 9, page 17, added note about the state of I/Os after power-on.
In "Slave Parallel Mode," page 23, explained configuration bit alignment to SelectMap
port.
06/13/08
2.8
Added note that TDI, TMS, and TCK have a default pull-up resistor. Added note on maximum
daisy chain limit. Updated Figure 15 and Figure 18 since Mode pins can be pulled up to either
2.5V or 3.3V. Updated DLL section. Recommended using property or attribute instead of
primitive to define I/O properties. Updated description and links. Updated all modules for
continuous page, figure, and table numbering. Synchronized all modules to v2.8.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC2S200-6PQG208I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-II FPGA Family
XC2S200-6TQ144C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-II FPGA Family
XC2S200-6TQ144I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-II FPGA Family
XC2S200-6TQG144C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-II FPGA Family
XC2S200-6TQG144I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-II FPGA Family
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