參數(shù)資料
型號: XC2S100E-6TQ144C
廠商: Xilinx Inc
文件頁數(shù): 63/108頁
文件大?。?/td> 0K
描述: IC FPGA 1.8V 600 CLB'S 144-TQFP
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-IIE
LAB/CLB數(shù): 600
邏輯元件/單元數(shù): 2700
RAM 位總計(jì): 40960
輸入/輸出數(shù): 102
門數(shù): 100000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
其它名稱: 122-1206
58
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Pinout Tables
The following device-specific pinout tables include all pack-
ages available for each Spartan-IIE device. They follow the
pad locations around the die. In the TQ144 package, all
VCCO pins must be connected to the same voltage.
TQ144 Pinouts (XC2S50E and XC2S100E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Function
Bank
GND
-
P1
-
TMS
-
P2
-
I/O
7
P3
-
I/O
7
P4
-
I/O, VREF
Bank 7
7
P5
-
All
I/O
7
P6
-
I/O, L27P
7
P7
XC2S50E
XC2S100E
I/O, L27N
7
P8
XC2S50E
-
GND
-
P9
-
I/O, L26P_YY
7
P10
All
-
I/O, L26N_YY
7
P11
All
-
I/O, VREF
Bank 7, L25P
7
P12
XC2S50E
All
I/O, L25N
7
P13
XC2S50E
-
I/O
7
P14
-
I/O (IRDY)
7
P15
-
GND
-
P16
-
VCCO
-
P17
-
I/O (TRDY)
6
P18
-
VCCINT
-
P19
-
I/O
6
P20
-
I/O, L24P
6
P21
XC2S50E
-
I/O, VREF
Bank 6, L24N
6
P22
XC2S50E
All
I/O, L23P_YY
6
P23
All
-
I/O, L23N_YY
6
P24
All
-
GND
-
P25
-
I/O, L22P
6
P26
XC2S50E
-
I/O, L22N
6
P27
XC2S50E
XC2S100E
I/O
6
P28
-
I/O, VREF
Bank 6
6
P29
-
All
I/O
6
P30
-
I/O, L21P_YY
6
P31
All
-
I/O, L21N_YY
6
P32
All
-
M1
-
P33
-
GND
-
P34
-
M0
-
P35
-
VCCO
-
P36
-
M2
-
P37
-
I/O, L20N_YY
5
P38
All
-
I/O, L20P_YY
5
P39
All
-
I/O
5
P40
-
I/O, VREF
Bank 5
5
P41
-
All
I/O
5
P42
-
I/O, L19N_YY
5
P43
All
XC2S100E
I/O, L19P_YY
5
P44
All
-
GND
-
P45
-
VCCINT
-
P46
-
I/O, L18N_YY
5
P47
All
-
I/O, L18P_YY
5
P48
All
-
I/O, VREF
Bank 5
5
P49
-
All
I/O (DLL), L17N
5
P50
-
VCCINT
-
P51
-
GCK1, I
5
P52
-
VCCO
5
P53
-
GND
-
P54
-
GCK0, I
4
P55
-
TQ144 Pinouts (XC2S50E and XC2S100E)
(Continued)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Function
Bank
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XC2S100E-6TQ144C0776 制造商:Xilinx 功能描述:
XC2S100E-6TQ144I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE 1.8V FPGA Family
XC2S100E-6TQG144C 功能描述:IC FPGA 1.8V 600 CLB'S 144-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan®-IIE 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA(27x27)
XC2S100E-6TQG144I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE FPGA
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