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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | XA3S1200E-4FGG400I |
| 寤犲晢锛� | Xilinx Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 2/37闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC FPGA SPARTAN-3E 1200K 400-FBG |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 60 |
| 绯诲垪锛� | Spartan®-3E XA |
| LAB/CLB鏁�(sh霉)锛� | 8672 |
| 閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� | 19512 |
| RAM 浣嶇附瑷�(j矛)锛� | 516096 |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 304 |
| 闁€鏁�(sh霉)锛� | 1200000 |
| 闆绘簮闆诲锛� | 1.14 V ~ 1.26 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 宸ヤ綔婧害锛� | -40°C ~ 100°C |
| 灏佽/澶栨锛� | 400-BGA |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 400-FBGA锛�21x21锛� |
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DS635 (v2.0) September 9, 2009
Product Specification
10
R
ICCAUXQ
Quiescent VCCAUX
supply current
XA3S100E
13
22
mA
XA3S250E
26
43
mA
XA3S500E
34
63
mA
XA3S1200E
59
100
mA
XA3S1600E
86
150
mA
Notes:
1.
The numbers in this table are based on the conditions set forth in Table 6.
2.
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. Typical values are characterized using typical devices at room temperature (TJ of 25掳C at VCCINT = 1.2 V, VCCO = 3.3V, and
VCCAUX = 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum
voltage limits with VCCINT = 1.26V, VCCO = 3.465V, and VCCAUX = 2.625V. The FPGA is programmed with a 鈥渂lank鈥� configuration data file
(i.e., a design with no functional elements instantiated). For conditions other than those described above, (e.g., a design including functional
elements), measured quiescent current levels may be different than the values in the table. For more accurate estimates for a specific
design, use the Xilinx XPower tools.
3.
There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3E XPower Estimator provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower
Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates.
4.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
Table 8: Quiescent Supply Current Characteristics (Continued)
Symbol
Description
Device
I-Grade Maximum
Q-Grade
Maximum
Units
鐩搁棞(gu膩n)PDF璩囨枡 |
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| 93C86B-E/MS | IC EEPROM 16KBIT 1024X16 8-MSOP |
| XC3SD3400A-4CS484C | SPARTAN-3ADSP FPGA 3400K 484CSA |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
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