FN8214.1 October 25, 2005 Serial Clock and Data Data states on the SDA line can change only while SCL is LOW. SDA state changes while SCL is HI" />
參數(shù)資料
型號(hào): X96010V14IZ
廠商: Intersil
文件頁數(shù): 11/26頁
文件大小: 0K
描述: IC SENSOR CONDITIONER 14-TSSOP
標(biāo)準(zhǔn)包裝: 95
類型: 傳感器調(diào)節(jié)器
輸入類型: 電壓
輸出類型: 電壓
接口: 2 線
電流 - 電源: 15mA
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 1246 (CN2011-ZH PDF)
19
FN8214.1
October 25, 2005
Serial Clock and Data
Data states on the SDA line can change only while
SCL is LOW. SDA state changes while SCL is HIGH
are reserved for indicating START and STOP condi-
tions. See Figure 12. On power-up of the X96010, the
SDA pin is in the input mode.
Serial Start Condition
All commands are preceded by the START condition,
which is a HIGH to LOW transition of SDA while SCL
is HIGH. The device continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition has been
Serial Stop Condition
All communications must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA
while SCL is HIGH. The STOP condition is also used
to place the device into the Standby power mode after
a read sequence. A STOP condition can only be
issued after the transmitting device has released the
Serial Acknowledge
An ACK (Acknowledge), is a software convention used
to indicate a successful data transfer. The transmitting
device, either master or slave, releases the bus after
transmitting eight bits. During the ninth clock cycle, the
receiver pulls the SDA line LOW to acknowledge the
reception of the eight bits of data. See Figure 13.
The device responds with an ACK after recognition of
a START condition followed by a valid Slave Address
byte. A valid Slave Address byte must contain the
Device Type Identifier 1010, and the Device Address
bits matching the logic state of pins A2, A1, and A0.
If a write operation is selected, the device responds
with an ACK after the receipt of each subsequent
eight-bit word.
In the read mode, the device transmits eight bits of
data, releases the SDA line, and then monitors the line
for an ACK. The device continues transmitting data if
an ACK is detected. The device terminates further
data transmissions if an ACK is not detected. The
master must then issue a STOP condition to place the
device into a known state.
The X96010 acknowledges all incoming data and
address bytes except: 1) The “Slave Address Byte”
when the “Device Identifier” or “Device Address” are
wrong; 2) All “Data Bytes” when the “WEL” bit is “0”,
with the exception of a “Data Byte” addresses to loca-
tion 86h; 3) “Data Bytes” following a “Data Byte”
addressed to locations 80h, 85h, or 86h.
Figure 10. D/A Converter Power-on Reset Response
I
x
Ix x 10%
ADC TIME
Current
Time
Vcc
VADCOK
0V
Voltage
X96010
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