- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372533 > X40239 Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器) PDF資料下載
參數(shù)資料
| 型號： | X40239 |
| 英文描述： | Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器) |
| 中文描述： | 綜合系統(tǒng)管理IC三電壓監(jiān)測器，葡萄牙，2千比特的EEPROM內(nèi)存，單/雙副處長（帶2K的EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器） |
| 文件頁數(shù)： | 15/39頁 |
| 文件大?。?/td> | 215K |
| 代理商： | X40239 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
X4023x
– Preliminary Information
Characteristics subject to change without notice.
15 of 39
REV 1.0.4 7/12/01
www.xicor.com
2 kbit EEPROM ARRAY
Operations on the 2 kbit EEPROM Array, consist of
either 1, 2 or 3 byte command sequences. All opera-
tions on the EEPROM must begin with the Device Type
Identifier of the Slave Address set to 1010000. A Read
or Write to the EEPROM is selected by setting the LSB
of the Slave Address to the appropriate value R/W
(Read = “1”, Write=”0”).
In some cases when performing a Read or Write to the
EEPROM, an Address Byte may also need to be speci-
fied. This Address Byte can contain the values 00h to
FFh.
EEPROM Byte Write
In order to perform an EEPROM Byte Write operation
to the EEPROM array, the Write Enable Latch (WEL)
bit of the CR Register must first be set (See “BL1, BL0:
Block Lock protection bits - (Nonvolatile)” on page 18.)
For a write operation, the X4023x requires the Slave
Address Byte and an Address Byte. This gives the
master access to any one of the words in the array.
After receipt of the Address Byte, the X4023x responds
with an ACKNOWLEDGE, and awaits the next eight
bits of data. After receiving the 8 bits of the Data Byte,
it again responds with an ACKNOWLEDGE. The mas-
ter then terminates the transfer by generating a STOP
condition, at which time the X4023x begins the internal
write cycle to the nonvolatile memory (See Figure 11).
During this internal write cycle, the X4023x inputs are
disabled, so it does not respond to any requests from
the master. The SDA output is at high impedance. A
write to a region of EEPROM memory which has been
protected with the Block-Lock feature (See “BL1, BL0:
Block Lock protection bits - (Nonvolatile)” on page 18.),
suppresses the ACKNOWLEDGE bit after the Address
Byte.
EEPROM Page Write
In order to perform an EEPROM Page Write operation
to the EEPROM array, the Write Enable Latch (WEL)
bit of the CR Register must first be set (See “BL1, BL0:
Block Lock protection bits - (Nonvolatile)” on page 18.)
The X4023x is capable of a page write operation. It is
initiated in the same manner as the byte write opera-
tion; but instead of terminating the write cycle after the
first data byte is transferred, the master can transmit an
unlimited number of 8-bit bytes. After the receipt of
each byte, the X4023x responds with an ACKNOWL-
EDGE, and the address is internally incremented by
one. The page address remains constant. When the
counter reaches the end of the page, it “rolls over” and
goes back to ‘0’ on the same page.
For example, if the master writes 12 bytes to the page
starting at location 11 (decimal), the first 5 bytes are
written to locations 11 through 15, while the last 7 bytes
are written to locations 0 through 6. Afterwards, the
address counter would point to location 7. If the master
supplies more than 16 bytes of data, then new data
overwrites the previous data, one byte at a time (See
Figure 13).
The master terminates the Data Byte loading by issu-
ing a STOP condition, which causes the X4023x to
begin the nonvolatile write cycle. As with the byte write
operation, all inputs are disabled until completion of the
internal write cycle. See Figure 12 for the address,
ACKNOWLEDGE, and data transfer sequence.
S
t
a
r
t
S
t
o
p
Slave
Address
Address
Byte
Data
(n)
A
C
K
A
C
K
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
Data
(1)
A
C
K
(2 < n < 16)
Figure 12. EEPROM Page Write Operation
1 0 1 0 0 0 0 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| x40410(中文) | 4kbit EEPROM Dual Voltage Monitor with Integrated CPU Supervisor(4K位EEPROM 雙電壓監(jiān)測的CPU監(jiān)控器) |
| X40420(中文) | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421(中文) | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40430(中文) | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40431(中文) | Dual Voltage Monitor with Intergrated CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40239S16I-A | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40239S16I-AT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40239S16I-B | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40239S16I-BT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X-4028-P-C32-R | 功能描述:音頻指示器及警報器 2800Hz 105dBA 32Vdc RoHS:否 制造商:PUI Audio 產(chǎn)品:Indicators 聲壓級:85 dB 音調(diào):Continuous 頻率:2300 Hz +/- 300 Hz 電壓額定值:5 VDC 電流額定值:30 mA 端接類型: 直徑:12 mm 安裝:Through Hole |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。