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參數(shù)資料
| 型號(hào)： | X28HC64PIZ-90 |
| 廠商： | INTERSIL CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 5 Volt, Byte Alterable EEPROM |
| 中文描述： | 8K X 8 EEPROM 5V, 90 ns, PDIP28 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MS-011AB, DIP-28 |
| 文件頁(yè)數(shù)： | 4/17頁(yè) |
| 文件大?。?/td> | 265K |
| 代理商： | X28HC64PIZ-90 |
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4
FN8109.1
June 7, 2006
PIN DESCRIPTIONS
Addresses (A
0
-A
12
)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all
read/write operations. When CE is HIGH, power con-
sumption is reduced.
Output Enable (OE)
The Output Enable input controls the data output buff-
ers and is used to initiate read operations.
Data In/Data Out (I/O
0
-I/O
7
)
Data is written to or read from the X28HC64 through
the I/O pins.
Write Enable (WE)
The Write Enable input controls the writing of data to
the X28HC64.
PIN NAMES
BLOCK DIAGRAM
Symbol
A
0
-A
12
I/O
0
-I/O
7
WE
CE
OE
V
CC
V
SS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
No Connect
X Buffers
Latches and
Decoder
I/O Buffers
and Latches
Y Buffers
Latches
and
Decoder
Control
Logic and
Timing
65,536-Bit
EEPROM
Array
I/O
–I/O
Data Inputs/Outputs
CE
OE
WE
V
CC
V
SS
A
0
–A
12
Address
Inputs
X28HC64
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PDF描述 |
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| X28HC64PZ-70 | 5 Volt, Byte Alterable EEPROM |
| X28HC64PZ-90 | 5 Volt, Byte Alterable EEPROM |
| X28HC64SZ-70 | 5 Volt, Byte Alterable EEPROM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X28HC64PM-12 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
| X28HC64PM-50 | 制造商:XICOR 制造商全稱(chēng):Xicor Inc. 功能描述:5 Volt, Byte Alterable E2PROM |
| X28HC64PM-70 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
| X28HC64PM-90 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
| X28HC64PMB-12 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
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