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參數(shù)資料
| 型號： | X28HC64PIZ-90 |
| 廠商： | INTERSIL CORP |
| 元件分類： | DRAM |
| 英文描述： | 5 Volt, Byte Alterable EEPROM |
| 中文描述： | 8K X 8 EEPROM 5V, 90 ns, PDIP28 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MS-011AB, DIP-28 |
| 文件頁數(shù)： | 14/17頁 |
| 文件大小： | 265K |
| 代理商： | X28HC64PIZ-90 |
14
FN8109.1
June 7, 2006
A.C. CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified.)
Read Cycle Limits
Read Cycle
Note:
(4) t
LZ
min., t
HZ
, t
OLZ
min., and t
OHZ
are periodically sampled and not 100% tested. t
HZ
max. and t
OHZ
max. are measured from the point
when CE or OE return HIGH (whichever occurs first) to the time when the outputs are no longer driven.
Symbol
t
RC
t
CE
t
AA
t
OE
t
LZ(4)
t
OLZ(4)
t
HZ(4)
t
OHZ(4)
t
OH
Parameter
X28HC64-70
-55°C to +125°C
Min.
70
X28HC64-90
-55°C to +125°C
Min.
90
X28HC64-12
-55°C to +125°C
Min.
120
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max.
Max.
Max.
Read cycle time
Chip enable access time
Address access time
Output enable access time
CE LOW to active output
OE LOW to active output
CE HIGH to high Z output
OE HIGH to high Z output
Output hold from address change
70
70
35
90
90
40
120
120
50
0
0
0
0
0
0
30
30
30
30
30
30
0
0
0
t
CE
t
RC
Address
CE
OE
WE
Data Valid
t
OE
t
LZ
t
OLZ
t
OH
t
AA
t
HZ
t
OHZ
Data I/O
V
IH
HIGH Z
Data Valid
X28HC64
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