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參數(shù)資料
| 型號(hào)： | WEDPF2M64B-120BC3 |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 2M X 64 FLASH 3.3V PROM MODULE, 120 ns, PBGA119 |
| 封裝： | STACKED TSOP, BGA-119 |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 317K |
| 代理商： | WEDPF2M64B-120BC3 |
11
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDPF2M64-XBX3
Enter
Embedded
Erasing
WE
Erasing
Suspend
Enter Erase
Suspend Program
Erase
Resume
DQ6
Erase
Erase Suspend
Read
Erase
Suspend
Program
Erase
Suspend
Read
Erase
Complete
wedpf2m64fig12.eps
FIG 11: TOGGLE BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
NOTE: VA = Valid address, not required for DQ6. Illustration shows first two status cycle after comand sequence, last status read cycle, and array data read cycle.
FIG 12: DQ2 VS. DQ6
NOTE: DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE or CS.
VA
tAS
tAHT
tASO
tCEPH
tASO
tOEPH
tDH
Valid Data
Valid Status
Valid
Data
tOE
(First Read)
(Second Read)
(Stops Toggling)
RY/BY
DQ6/DQ2
OE
CS
Addresses
WE
wedpf2m64fig11.eps
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