參數(shù)資料
型號: W986432DH-7L
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 2M X 32 SYNCHRONOUS DRAM, 5.5 ns, PDSO86
封裝: 0.400 INCH, 0.50 MM PITCH, TSOP2-86
文件頁數(shù): 18/48頁
文件大小: 1648K
代理商: W986432DH-7L
W986432DH
Publication Release Date: July 30, 2002
- 25 -
Revision A5
Operating Timing Example, continued
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Autoprecharge)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
(CLK = 100 MHz)
CLK
CKE
DQM
A0-A9
A10
BS1
WE
CAS
RAS
CS
BS0
tRC
tRAS
tRP
tRAS
tRP
tRAS
tRP
tRAS
tRCD
tAC
tRRD
Active
Read
Active
Read
Active
Read
tRC
RAa
RAc
RBd
RAe
DQ
aw0
aw1
aw2
aw3
bx0
bx1
bx2
bx3
cy0
cy1
cy2
cy3
dz0
* AP is the internal precharge start timing
Bank #0
Idle
Bank #1
Bank #2
Bank #3
AP*
RAa
CAw
RBb
CBx
RAc
CAy
RBd
RAe
CBz
RBb
AP*
tRCD
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