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參數(shù)資料
| 型號(hào)： | W3E64M72S-200BI |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 64M X 72 SYNCHRONOUS DRAM, 0.8 ns, PBGA219 |
| 封裝： | 25 X 32 MM, PLASTIC, BGA-219 |
| 文件頁(yè)數(shù)： | 2/19頁(yè) |
| 文件大?。?/td> | 674K |
| 代理商： | W3E64M72S-200BI |
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W3E64M72S-XBX
10
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
June 2005
Rev. 0
ADVANCED
White Electronic Designs Corp. reserves the right to change products or specications without notice.
NOTES:
1.
CKE is HIGH for all commands shown except SELF REFRESH.
2.
A0-12 dene the op-code to be written to the selected Mode Register. BA0, BA1
select either the mode register (0, 0) or the extended mode register (1, 0).
3.
A0-12 provide row address, and BA0, BA1 provide bank address.
4.
A0-9, 11 provide column address; A10 HIGH enables the auto precharge feature
(non persistent), while A10 LOW disables the auto precharge feature; BA0, BA1
provide bank address.
5.
A10 LOW: BA0, BA1 determine the bank being precharged. A10 HIGH: All banks
precharged and BA0, BA1 are “Don’t Care.”
TRUTH TABLE – COMMANDS (NOTE 1)
NAME (FUNCTION)
CS#
RAS#
CAS#
WE#
ADDR
DESELECT (NOP) (9)
H
X
NO OPERATION (NOP) (9)
L
H
X
ACTIVE (Select bank and activate row) ( 3)
L
H
Bank/Row
READ (Select bank and column, and start READ burst) (4)
L
H
L
H
Bank/Col
WRITE (Select bank and column, and start WRITE burst) (4)
L
H
L
Bank/Col
BURST TERMINATE (8)
L
H
L
X
PRECHARGE (Deactivate row in bank or banks) ( 5)
L
H
L
Code
AUTO REFRESH or SELF REFRESH (Enter self refresh mode) (6, 7)
L
H
X
LOAD MODE REGISTER (2)
L
Op-Code
TRUTH TABLE – DM OPERATION
NAME (FUNCTION)
DM
DQs
WRITE ENABLE (10)
L
Valid
WRITE INHIBIT (10)
H
X
6.
This command is AUTO REFRESH if CKE is HIGH; SELF REFRESH if CKE is
LOW.
7.
Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t
Care” except for CKE.
8.
Applies only to read bursts with auto precharge disabled; this command is
undened (and should not be used) for READ bursts with auto precharge enabled
and for WRITE bursts.
9.
DESELECT and NOP are functionally interchangeable.
10. Used to mask write data; provided coincident with the corresponding data.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3E64M72S-200BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64Mx72 DDR SDRAM |
| W3E64M72S-200ESC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64Mx72 DDR SDRAM |
| W3E64M72S-200ESI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64Mx72 DDR SDRAM |
| W3E64M72S-200ESM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64Mx72 DDR SDRAM |
| W3E64M72S-200SBC | 制造商:Microsemi Corporation 功能描述:64M X 72 DDR, 2.5V, 200 MHZ, 219 PBGA, COMMERCIAL TEMP. - Bulk |
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