參數資料
型號: W2Z512K72SJ35ES
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類: SRAM
英文描述: 512K X 72 MULTI DEVICE SRAM MODULE, 3.5 ns, PBGA209
封裝: PLASTIC, BGA-209
文件頁數: 7/12頁
文件大?。?/td> 281K
代理商: W2Z512K72SJ35ES
4
White Electronic Designs Corporation Westborough, MA (508) 366-5151
W2Z512K72SJ
ABSOLUTE MAXIMUM RATINGS*
Voltage on VDD Supply Relative to VSS
-0.3V to +3.6V
VIN (DQx)
-0.3V to +3.6V
VIN (Inputs)
-0.3V to +3.6V
Storage Temperature (BGA)
-55°C to +125°C
Short Circuit Output Current
100mA
ELECTRICAL CHARACTERISTICS
*Stress greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions greater than those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating condtions for extended periods may affect reliability.
NOTES:
1. All voltages referenced to VSS (GND)
2.
ZZ pin has an internal pull-up, and input leakage is higher.
DC CHARACTERISTICS
NOTES:
1. IDD is specified with no output current and increases with faster cycle times.
2. Typical values are measured at 2.5V, 25°C, and 10ns cycle time.
3. Typical values are measured at 2.5V, 25°C.
BGA CAPACITANCE
NOTES:
1. This parameter is sampled.
Description
Symbol
Conditions
Typ
Max
Units
Notes
Control Input Capacitance
CI
TA = 25°C; f = 1MHz
5
7
pF
1
Input/Output Capacitance (DQ)
CO
TA = 25°C; f = 1MHz
6
8
pF
1
Address Capacitance
CA
TA = 25°C; f = 1MHz
5
7
pF
1
Clock Capacitance
CCK
TA = 25°C; f = 1MHz
3
5
pF
1
Description
Symbol
Conditions
Min
Max
Units
Notes
Input High (Logic 1) Voltage
VIH
1.7
VDD +0.3
V
1
Input Low (Logic 0) Voltage
VIL
-0.3
0.7
V
1
Input Leakage Current
ILI
0V VIN VDD
-5
5
A
2
Output Leakage Current
ILO
Output(s) Disabled, 0V VIN VDD
-5
5
A
Output High Voltage
VOH
IOH = -1.0mA
2.0
V
1
Output Low Voltage
VOL
IOL = 1.0mA
0.4
V
1
Supply Voltage
VDD
2.375
2.625
V
1
225
200
166
150
Description
Symbol
Conditions
Typ
MHz MHz MHz MHz
Units
Notes
Power Supply
IDD
Device Selected; All Inputs VIL or VIH; Cycle
830
775
725
665
mA
1, 2
Current: Operating
Time = tCYC MIN; VDD = MAX; Output Open
Power Supply
ISB2
Device Deselected; VDD = MAX; All Inputs VSS + 0.2
30
60
mA
3
Current: Standby
or VDD - 0.2; All Inputs Static; CLK Frequency = 0;
ZZ VIL
Power Supply
ISB3
Device Selected; All Inputs VIL or VIH; Cycle
20
40
mA
2
Current: Current
Time = tCYC MIN; VDD = MAX; Output Open;
ZZ VDD - 0.2V
Clock Running
ISB4
Device Deselected; VDD = MAX; All Inputs
165
155
145
130
mA
2
Standby Current
VSS + 0.2 or VDD - 0.2; Cycle Time = tCYC
MIN; ZZ VIL
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