參數(shù)資料
型號: W24L11T-70L
元件分類: SRAM
英文描述: 128K X 8 STANDARD SRAM, 70 ns, PDSO32
封裝: TSOP-32
文件頁數(shù): 8/11頁
文件大小: 195K
代理商: W24L11T-70L
Preliminary W24L11
- 6 -
Timing Waveforms, continued
Write Cycle 1
Address
OE
TWC
TWR
WE
DOUT
DIN
TWP
TAS
TOHZ
(1, 4)
TDW
TDH
TAW
CS1
TCW
CS2
Write Cycle 2
(OE = VIL Fixed)
WE
D OUT
DIN
TAS
TDH
TWP
TWHZ
DW
T
(2)
(3)
TOW
TOH
AW
T
(1, 4)
TCW
TWR
Address
T WC
CS1
CS2
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. DOUT provides the read data for the next address.
4. Transition is measured
±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
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