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參數資料
| 型號： | W19L320SBB9L |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 3.3V PROM, 90 ns, PBGA48 |
| 封裝： | TFBGA-48 |
| 文件頁數： | 7/52頁 |
| 文件大?。?/td> | 1869K |
| 代理商： | W19L320SBB9L |
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W19B(L)320ST/B
Publication Release Date: March 23, 2004
- 15 -
Revision A2
During the Embedded Program algorithm, the device outputs on DQ7 and the complement of the data
programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. Once the
Embedded Program algorithm has completed, the device outputs the data programmed to DQ7. The
system must provide the program address to read valid status information on DQ7. If a program
address falls within a protected sector, #Data Polling on DQ7 is active for about 1
S, and then the
device returns to the read mode.
During the Embedded Erase algorithm, #Data Polling produces “0” on DQ7. Once the Embedded
Erase algorithm has completed, or when the device enters the Erase Suspend mode, #Data Polling
produces “1” on DQ7. An address within any of the sectors selected for erasure must be provided to
read valid status information on DQ7.
After an erase command sequence is written, if all sectors selected for erasing are protected, #Data
Polling on DQ7 is active for about 100
S, and then the device returns to the read mode. If not all
selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and
ignores the selected sectors that are protected. However, if the system reads DQ7 at an address
within a protected sector, the status may not be valid.
Just before the completion of an Embedded Program or Erase operation, DQ7 may change
asynchronously with DQ0
DQ6 while Output Enable (#OE) is set to low. That is, the device may
change from providing status information to valid data on DQ7. Depending on when it samples the
DQ7 output, the system may read the status or valid data. Even if the device has completed the
program or erase operation and DQ7 has valid data, the data outputs on DQ0
DQ6 may be still
invalid. Valid data on DQ0-DQ7 will appear on successive read cycles.
6.3.2 RY/#BY: Ready/#Busy
The RY/#BY is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is
in progress or complete. The RY/#BY status is valid after the rising edge of the final #WE pulse in the
command sequence. Since RY/#BY is an open-drain output, several RY/#BY pins can be tied together
in parallel with a pull-up resistor to VDD.
When the output is low (Busy), the device is actively erasing or programming. (This includes
programming in the Erase Suspend mode.) When the output is high (Ready), the device is in the read
mode, the standby mode is in the erase-suspend-read mode.
6.3.3 DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at
any address, and is valid after the rising edge of the final #WE pulse in the command sequence
(before the program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address
cause DQ6 to toggle. The system may use either #OE or #CE to control the read cycles. Once the
operation has completed, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6
toggles for about 100
S, and then returns to reading array data. If not all selected sectors are
protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the selected
sectors which are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is
erase-suspended. If the device is actively erasing (i.e., the Embedded Erase algorithm is in progress),
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