參數(shù)資料
型號: W19B320ABBBG
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 2M X 16 FLASH 3V PROM, 70 ns, PBGA48
封裝: 6 X 8 MM, 0.80 MM PITCH, TFBGA-48
文件頁數(shù): 34/53頁
文件大?。?/td> 479K
代理商: W19B320ABBBG
W19B320AT/B
- 4 -
1. GENERAL DESCRIPTION
The W19B320AT/B is a 32Mbit, 2.7~3.6-volt flexible bank CMOS flash memory organized as 4M x 8
or 2M
× 16 bits. The word-wide (× 16) data appears on DQ15-DQ0, and byte-wide (x 8) data appears
on DQ7-DQ0. The device can be programmed and erased in-system with a standard 3.0-volt power
supply. A 12-volt VPP is not required. The unique cell architecture of the W19B320AT/B results in fast
program/erase operations with extremely low current consumption (compared to other comparable
3-volt flash memory products). The device can also be programmed and erased by using standard
EPROM programmers.
2. FEATURES
Performance
2.7~3.6-volt write (program and erase)
operations
Fast write operation
Sector erases time: 0.4 Sec (typical)
Chip erases time: 49 Sec (typical)
Byte programming time: 5 μs (typical)
Read access time: 70 ns
Typical program/erase cycles:
100K
Twenty-year data retention
Ultra low power consumption
Active current (Read): 10 mA (typical)
Active current (Read while Erase/Program):
21 mA (typical)
Standby current: 0.2 μA (typical)
Architecture
Flexible Bank architectures
Consist of four banks that customer can
group the bank size as they needed
Bank 1: 4M; Bank 2: 12M;
Bank 3: 12M; Bank 4: 4M
Security Sector Size: 256 Bytes
The Security Sector is an OTP; once the
sector is programmed, it cannot be erased
Simultaneous Read/write operation
Data can be continuously read from one bank
while processing erase/program functions in
other bank with zero latency
JEDEC standard byte-wide and word-wide
pinouts
Manufactured on WinStack 0.18μm process
technology
Available packages: 48-pin TSOP and 48-ball
TFBGA (6x8mm)
Software Features
Compatible with common Flash Memory
Interface (CFI) specification
Flash device parameters stored directly on
the device
Allows software driver to identify and use a
variety of different current and future Flash
products
Erase Suspend/Erase Resume
Suspends erase operations to allow
programming in same bank
End of program detection
Software method: Toggle bit/Data polling
Unlock Bypass Program command
Reduces overall programming time when
issuing multiple program command
sequences
Hardware Features
Ready/#Busy output (RY/#BY)
Detect program or erase cycle completion
Hardware reset pin (#RESET)
Reset the internal state machine to the read
mode
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