參數(shù)資料
型號: W158H
廠商: Silicon Laboratories Inc
文件頁數(shù): 6/12頁
文件大?。?/td> 0K
描述: IC CLOCK CK98 SSCG CK98 56SSOP
標(biāo)準(zhǔn)包裝: 26
類型: *
PLL: 帶旁路
輸入: 晶體
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:24
差分 - 輸入:輸出: 無/無
頻率 - 最大: 133MHz
除法器/乘法器: 是/無
電源電壓: 2.375 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
W158
..... Document #: 38-07164 Rev. *A Page Page 3 of 12 of 12
Spread Spectrum Clocking
The device generates a clock that is frequency modulated in
order to increase the bandwidth that it occupies. By increasing
the bandwidth of the fundamental and its harmonics, the ampli-
tudes of the radiated electromagnetic emissions are reduced.
This effect is depicted in Figure 1.
As shown in Figure 1, a harmonic of a modulated clock has a
much lower amplitude than that of an unmodulated signal. The
reduction in amplitude is dependent on the harmonic number
and the frequency deviation or spread. The equation for the
reduction is:
dB = 6.5 + 9*log10(P) + 9*log10(F)
Where P is the percentage of deviation and F is the frequency
in MHz where the reduction is measured.
The output clock is modulated with a waveform depicted in
Figure 2. This waveform, as discussed in “Spread Spectrum
Clock Generation for the Reduction of Radiated Emissions” by
Bush, Fessler, and Hardin produces the maximum reduction
in the amplitude of radiated electromagnetic emissions. The
deviation selected for this chip is –0.5% downspread. Figure
2 details the Cypress spreading pattern. Cypress does offer
options with more spread and greater EMI reduction. Contact
your local Sales representative for details on these devices.
Figure 1. Clock Harmonic with and without SSCG Modulation Frequency Domain Representation
100%
60%
20%
80%
40%
0%
–20%
–40%
–60%
–80%
–100%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Time
Fr
equ
e
ncy
Sh
if
t
Figure 2. Modulation Waveform Profile
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