參數(shù)資料
型號: VV5430
廠商: Electronic Theatre Controls, Inc.
英文描述: Integrated CMOS Image Sensor with support for ADC and external control via serial interface
中文描述: 集成CMOS ADC和與外部控制支持通過串行接口圖像傳感器
文件頁數(shù): 8/32頁
文件大小: 288K
代理商: VV5430
8
cd27033c.fm
VISION
V V 5430 Sensor
Peimnry
ANALOGUE VOLTAGE REFERENCES
2
VBG
OA
Internal bandgap reference voltage (1.22V nominal). Requires external
0.1uF capacitor.
3
VOFF/VPED
IA
Pedestal DAC & offset comp. DAC bias. Connect to VBG or external ref-
erence.
4
DEC2V2
OA
Decouple 2.2V reference. Requires external 0.1uF capacitor.
5
DEC2V7
OA
Decouple 2.7V reference. Requires external 0.1uF capacitor.
6
-
DNC
Do NOT connect - for test use only
8
EBCK
IA
External black level bias. Internally generated. Decouple to VGND
9
EVWT
IA
External white pixel threshold for exposure control. Decouple to VGND
43
VBLWT
IA
Defines white level for clamp circuitry. Requires external 0.1uF capacitor.
44
VBLOOM
OA
Anti-blooming voltage reference. Requires external 0.1uF capacitor.
45
VRT
IA
Pixel reset voltage. Connect to VREF2V7 or external reference.
46
VCM
IA
Offset DAC common mode input. Connect to VREF2V7.
47
VREF2V7
OA
Internally generated 2.7V reference. Requires external 4.7uF capacitor.
ANALOGUE OUTPUTS
14
AVO
OA
Buffered Analogue video out. Can drive a doubly terminated 75ohm load.
SYSTEM CLOCKS
25
CKOUT
OD
Oscillator output. Connect Crystal for standard timing.
26
CKIN
ID
Oscillator input. Connect Crystal for standard timing.
IMAGE CAPTURE TIMING SIGNALS
30
LST
32
PV
OD
Pixel sample clock. Qualifies video output for external image capture.
33
PVB
OD
Pixel sample clock bar. Inverse of PV.
35
CPE
ID
Pixel sample clock enable. Default CPE = 0 i.e. PV/PVB disabled.
36
FST
OD
Field start. Synchronises external image capture.
Pin
Name
Type
Description
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