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參數(shù)資料
| 型號： | VSC830 |
| 廠商： | Vitesse Semiconductor Corporation. |
| 英文描述： | 2.7Gb/s Asynchronous Dual 2x2 Crosspoint Switch |
| 中文描述： | 2.7Gb / s的異步雙2x2交叉點開關(guān) |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 195K |
| 代理商： | VSC830 |
VITESSE
Data Sheet
VSC830
Dual 2x2 Crosspoint Switch
2.7Gb/s Asynchronous
G52192-0, Rev 4.0
05/23/01
Page 1
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano Camarillo, CA 93012
Tel: (800) VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Features
Dual 2x2 Crosspoint Switch
General Description
The VSC830 is a monolithic dual 2x2 asynchronous crosspoint switch, designed for critical signal path
control and buffering applications, such as loop-back, protection switching, and multi-channel backplane
driver/receivers. Signal path delay is tightly matched between each output channel to eliminate the need for
delay path compensation when switching between signal sources.
The crosspoint function is based on a multiplexer tree architecture. Each 2x2 switch can be considered as a
pair of 2:1 multiplexers that share the same inputs. The signal path through each switch is fully differential and
delay matched. The signal path is unregistered, so there are no restrictions on the phase, frequency, or signal
pattern at each input. Unused outputs can be independently powered off, thereby eliminating power on unused
sections (see
Design Guide
section in this data sheet). The switch control inputs can be configured to be com-
patible with PECL or TTL levels. The high-speed input and output levels are nominally PECL compatible and
capable of interfacing with a wide range of termination schemes.
VSC830 Symbol Diagram
2.7Gb/s NRZ Data Bandwidth, 2.7GHz Signal
Bandwidth
PECL/TTL-Compatible Control Inputs
PECL-Compatible High-Speed I/O
50
Source Terminated Output Driver and
Programmable Input Terminations
Single 3.3V Supply, 1W Typical Dissipation
Power-Down Capability for Unused Outputs
Compact 44-Pin PQFP, 10x10mm Package
A1
Y1
A2
Y2
S1,S2
A1
Y1
A2
Y2
S1,S2
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