參數(shù)資料
型號(hào)： VPX3224D
廠商： Electronic Theatre Controls, Inc.
英文描述： Video Pixel Decoders
中文描述： 視頻解碼器像素
文件頁(yè)數(shù)： 77/92頁(yè)
文件大?。?/td> 672K
代理商： VPX3224D
VPX 3225D, VPX 3224D
PRELIMINARY DATA SHEET
77
Micronas
FP-RAM VPX Back-End
Name
Default
Function
Mode
Number
of Bits
Address
Hex
Read Table for Window #2
h’11f
12
r
Position of VACT
bit [11:1]:
Delay of VACT relative to the trailing edge of HREF
vact_delay2
Load Table for Window #2 (WinLoadTab2)
h’12A
12
w
Vertical Begin
17
bit [8:0]:
Vertical Begin (first active video line within a field)
min. line number for 625/50 standards: 7
min. line number for 525/60 standards: 10
max. line number: determined by current TV line standard
vbeg2
bit [11:9]:
reserved (must be set to zero)
h’12B
12
w
Vertical Lines In
500
bit [8:0]:
Number of input lines
determines the range between the first and the last active
video line within a field; vbeg + vlinei should not exceed the
max. number of lines determined by the current line
standard (exceeding values will be corrected automatically)
vlinei2
bit [9]:
enable temporal decimation (0: off, 1: on)
with temporal decimation enabled, only the number of
frames selected in register h’157 (tdecframes) will be output
within an interval of 3000 frames
tdec2
bit [11:10]: field disable flags
11: Window disabled
10: Window enabled in ODD fields only
01: Window enabled in EVEN fields only
00: Window enabled in both fields
h’12C
12
w
Vertical Lines Out
240
bit [8:0]:
Number of output lines
vlineout cannot be greater than vlinein (no interpolation);
for vlineout < vlinein vertical compression via line dropping
is applied
vlineo2
bit [11:9]:
reserved (must be set to zero)
h’12D
12
w
Horizontal Begin
0
bit [10:0]: Horizontal start of window after scaling (relative to npix)
hbeg > 0 enables cropping on the left side of the window
hbeg2
bit [11]:
reserved (must be set to zero)
h’12E
12
w
Horizontal Length
640
bit [10:0]: Horizontal length of window after scaling (relative to npix)
hbeg + hlen can not exceed npix
hlen2
bit [11]:
reserved (must be set to zero)
h’12F
12
w
Number of Pixels
640
bit [10:0]: Number of active pixels for the full active line (after scaling)
npix must be an even value within the range 32...864
npix2
bit [11]:
reserved (must be set to zero)
相關(guān)PDF資料
PDF描述
VPX3224E Video Pixel Decoders
VPX322XE Video Pixel Decoders
VQ1000J N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓60V,夾斷電流0.225A的N溝道增強(qiáng)型MOSFET晶體管)
VQ1000J N-Channel 60-V (D-S) MOSFET
VQ1001J Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VPX3224D-C3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor
VPX3224E 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders
VPX3225D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Pixel Decoders
VPX3225D-C3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor
VPX3225E 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders
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