參數(shù)資料
型號: VP0535
廠商: Supertex, Inc.
英文描述: P-Channel Enhancement-Mode Vertical DMOS FETs
中文描述: P通道增強模式垂直的DMOS場效應(yīng)管
文件頁數(shù): 1/4頁
文件大小: 70K
代理商: VP0535
7-237
9
7
VP0535
VP0540
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Note: See Package Outline section for dimensions.
P-Channel Enhancement-Mode
Vertical DMOS FETs
Package Options
High Reliability Devices
See pages 5-4 and 5-5 for MILITARY STANDARD Process
Flows and Ordering Information.
Absolute Maximum Ratings
Drain-to-Source Voltage
BV
DSS
BV
DGS
±
20V
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
-55
°
C to +150
°
C
Soldering Temperature*
*
Distance of 1.6 mm from case for 10 seconds.
300
°
C
Applications
Motor controls
Converters
Amplifiers
Switches
Power supply circuits
Drivers (relays, hammers, solenoids, lamps, memories,
displays, bipolar transistors, etc.)
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low C
ISS
and fast switching speeds
Excellent thermal stability
Integral Source-Drain diode
High input impedance and high gain
Complementary N- and P-channel devices
Order Number / Package
BV
DSS
/
BV
DGS
-350V
R
DS(ON)
(max)
I
D(ON)
(min)
TO-39
TO-92
Die
75
-200mA
VP0535N2
VP0535N3
VP0535ND
-400V
75
-200mA
VP0540N3
VP0540ND
MIL visual screening available
TO-39
TO-92
Ordering Information
S G D
D G S
Case: DRAIN
– OBSOLETE –
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