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參數(shù)資料
| 型號： | VC-709-PCIE2-100M000000 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 100 MHz, HSCL OUTPUT |
| 封裝： | ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-6 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大小： | 325K |
| 代理商： | VC-709-PCIE2-100M000000 |
Vectron International 267 Lowell Road, Hudson, NH 03051 Tel: 1-88-VECTRON-1 http://www.vectron.com
Page3
Package and Pinout
Table 2. Pinout
Pin #
1
2
3
4
5
6
Symbol
E/D
NC
GND
f
O
Cf
O
V
DD
Function
Enable/Disable
No Connection
Electrical and Lid Ground
Output Frequency
Complementary Output Frequency
Supply Voltage
Figure 4. Package Outline Drawing
7.0±0.15
5
5.0±0.15
1.40
1.20
3.57
2.54
5.08
Frequency
Date Code
1
3
1
Bottom View
5
2
2
3
6
4
6
4
1.8 max
Figure 3. Pad Layout
1.96
3.66
5.08
2.54
1.78
HCSL Application Diagrams
The VC-709 incorporates a standard High Speed Current Logic, HCSL ,output scheme which is a 15mA current source switched between Out and Comple-
mentary Out. Being un-terminated drains, as shown in Figure 5, they require external 50 ohm resistors to ground as shown in Figure 6. HCSL is a high
impedance output with quick switching times, in can be advantageous to use a 10 to 30 ohm series resistor to help reduce overshoot/ringing.
Figure 5.
Standard HCSL Output Configuration
Figure 6.
Single Resistor Termination Scheme
Figure 7.
In some cases a 10-30 ohm series resistor is
used to help reduce overshoot.
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-termi-
nated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching
into account. Load matching and power supply noise are the main contributors to jitter related problems.
15mA
Dimensions are in mm
50 Ω
50 Ω
1
6
2
5
3
4
Z
L
=50 ohms
Z
L
=50 ohms
50 Ω
1
6
2
5
3
4
50 Ω
Z
L
=50 ohms
Z
L
=50 ohms
10-30 Ω
10-30 Ω
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