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參數(shù)資料
| 型號(hào)： | V53C8125LK60LE |
| 廠商： | MOSEL-VITELIC |
| 元件分類： | DRAM |
| 英文描述： | 128K X 8 FAST PAGE DRAM, 60 ns, PDSO24 |
| 封裝： | 0.300 INCH, SOJ-26/24 |
| 文件頁數(shù)： | 15/18頁 |
| 文件大小： | 224K |
| 代理商： | V53C8125LK60LE |
6
V53C8125L Rev. 1.4 November 1997
MOSEL VITELIC
V53C8125L
34
tWL1GL2
tWOH
Write to OE Hold Time
10
ns
14
35
tGH2DX
tOED
OE to Data Delay Time
10
ns
14
36
tRL2RL2
(RMW)
tRWC
Read-Modify-Write Cycle Time
170
ns
37
tRL1RH1
(RMW)
tRRW
Read-Modify-Write Cycle RAS Pulse Width
105
ns
38
tCL1WL2
tCWD
CAS to WE Delay
40
ns
12
39
tRL1WL2
tRWD
RAS to WE Delay in Read-Modify-Write Cycle
85
ns
12
40
tCL1CH1
tCRW
CAS Pulse Width (RMW)
65
ns
41
tAVWL2
tAWD
Col. Address to WE Delay
58
ns
12
42
tCL2CL2
tPC
Fast Page Mode Read or Write Cycle Time
40
ns
43
tCH2CL2
tCP
CAS Precharge Time
10
ns
44
tAVRH1
tCAR
Column Address to
RAS Setup Time
30
ns
45
tCH2QV
tCAP
Access Time from Column Precharge
34
ns
7
46
tRL1DX
tDHR
Data in Hold Time Referenced to
RAS
50
ns
47
tCL1RL2
tCSR
CAS Setup Time CAS-before-RAS Refresh
10
ns
48
tRH2CL2
tRPC
RAS to CAS Precharge Time
0
ns
49
tRL1CH1
tCHR
CAS Hold Time CAS-before-RAS Refresh
15
ns
50
tCL2CL2
(RMW)
tPCM
Fast Page Mode Read-Modify-Write Cycle Time
85
ns
51
tT
Transition Time (Rise and Fall)
5
50
ns
15
52
tREF
Refresh Interval (512 Cycles)
8
ms
17
#
JEDEC
Symbol
Parameter
60
Unit
Notes
Min.
Max.
AC Characteristics (Cont’d)
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