參數(shù)資料
型號(hào): USB97C223
廠商: SMSC Corporation
英文描述: capacitor Selection for Internal Regulator Output Pins
中文描述: 電容的選擇內(nèi)部穩(wěn)壓器輸出引腳
文件頁數(shù): 10/59頁
文件大?。?/td> 385K
代理商: USB97C223
SMSC DS – USB97C201
Page 10
Rev. 03/25/2002
PRELIMINARY
5.0 PIN DESCRIPTIONS
DISK DRIVE INTERFACE
IS
This pin is the active high DMA request from
the ATA/ATAPI interface.
IDE DMA
Request
IDE_DRQ
IDE IO Read
Strobe
IDE_nIOR
O20
This pin is the active low read signal for the
interface.
IDE Register
Address 1
IDE_SA1
O20
This pin is the register select address bit 1
signal for the ATA/ATAPI interface.
IDE Register
Address 0
IDE_SA0
O20
This pin is the register select address bit 0
signal for the ATA/ATAPI interface.
IDE Register
Address 2
IDE_SA2
O20
This pin is the register select address bit 2
signal for the ATA/ATAPI interface.
IDE Data
IDE_D15
IO20
This pin is the bi-directional data bus bit 15
signal for the ATA/ATAPI interface.
IDE IO Write
Strobe
IDE_nIOW
O20
This pin is active low write signal for the
ATA/ATAPI interface.
IDE DMA
Acknowledge
IDE_nDACK
O20
This pin is the active low DMA acknowledge
signal for the ATA/ATAPI interface.
IDE Interrupt
Request
IDE_IRQ
IS
This pin is the active high interrupt request
signal for the ATA/ATAPI interface.
IDE Data
IDE_D13
IO20
This pin is the bi-directional data bus bit 13
signal for the ATA/ATAPI interface.
IDE Data
IDE_D14
IO20
This pin is the bi-directional data bus bit 14
signal for the ATA/ATAPI interface.
.
This pin is the active low chip select 0 signal
for the ATA/ATAPI interface.
IDE Chip
Select 0
IDE_nCS0
O20
IDE Chip
Select 1 0
IDE_nCS1
O20
This pin is the active low select 1 signal for the
ATA/ATAPI interface.
IDE Data
IDE_D[0:12]
IO20
These pins are bits 0-12 of the ATA/ATAPI bi-
directional data bus.
This pin is the active high IORDY signal from
the IDE drive.
IO Ready
IORDY
I
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