參數(shù)資料
型號： UPD8670A
廠商： NEC Corp.
英文描述： 7400 PIXELS CCD LINEAR IMAGE SENSOR
中文描述： 7400像素CCD線性圖像傳感器
文件頁數(shù)： 5/28頁
文件大小： 274K
代理商： UPD8670A
Data Sheet S17147EJ1V0DS
5
μ
PD8670A
ABSOLUTE MAXIMUM RATINGS (T
A
= +25
°
C)
Parameter
Symbol
Ratings
Unit
Output drain voltage
V
OD
0.3 to +14.0
0.3 to +8.0
V
Shift register clock voltage
V
φ
1
, V
φ
2
V
Last stage shift register clock voltage
V
φ
2L
0.3 to +8.0
V
Reset gate clock voltage
V
φ
R
0.3 to +8.0
V
Transfer gate clock voltage
V
φ
TG
0.3 to +8.0
V
Reset feed-through level clamp clock voltage
V
φ
CP
0.3 to +8.0
V
Operating ambient temperature
Note
T
A
0 to +60
°
C
Storage temperature
T
stg
40 to +70
°
C
Note
Use at the condition without dew condensation.
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the
verge of suffering physical damage, and therefore the product must be used under conditions that
ensure that the absolute maximum ratings are not exceeded.
RECOMMENDED OPERATING CONDITIONS (T
A
= +25
°
C)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Output drain voltage
V
OD
11.4
12.0
12.6
V
Shift register clock high level
V
φ
1H
, V
φ
2H
4.5
5.0
5.5
V
Shift register clock low level
V
φ
1L
, V
φ
2L
0.3
0
+0.5
V
Last stage shift register clock high level
V
φ
2LH
4.5
5.0
5.5
V
Last stage shift register clock low level
V
φ
2LL
0.3
0
+0.5
V
Reset gate clock high level
V
φ
RH
4.5
5.0
5.5
V
Reset gate clock low level
V
φ
RL
0.3
0
+0.5
V
Reset feed-through level clamp clock high level
V
φ
CPH
4.5
5.0
5.5
V
Reset feed-through level clamp clock low level
V
φ
CPL
0.3
0
+0.5
V
Transfer gate clock high level
V
φ
TGH
4.5
5.0
5.5
V
Transfer gate clock low level
V
φ
TGL
0.3
0
+0.5
V
Shift register clock amplitude
V
φ
1_pp
,
f < 10 MHz/ch
4.0
5.0
5.8
V
V
φ
2_pp
f
≥
10 MHz/ch
4.5
5.0
5.8
V
Last stage shift register clock amplitude
V
φ
2L_pp
4.5
5.0
5.8
V
Reset gate clock amplitude
V
φ
R_pp
4.5
5.0
5.8
V
Reset feed-through level clamp clock amplitude
V
φ
CP_pp
4.5
5.0
5.8
V
Transfer gate clock amplitude
V
φ
TG_pp
4.5
5.0
5.8
V
Data rate
2f
φ
R
1
2
44
MHz
相關(guān)PDF資料
PDF描述
UPD8862 (2700 + 2700) PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
UPD8862CY (2700 + 2700) PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
UPD8871 10680 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
UPD8871CY 10680 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
UPD8872CY (5400 + 5400) PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD8670ACY 制造商:NEC 制造商全稱:NEC 功能描述:7400 PIXELS CCD LINEAR IMAGE SENSOR
UPD8741AD 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
UPD8748D 制造商:NEC Electronics Corporation 功能描述:MicroController, 8-Bit, 40 Pin, Ceramic, DIP
UPD8748HC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
UPD8748HD 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*