
Data Sheet S17147EJ1V0DS
2
μ
PD8670A
DIFFERENCE BETWEEN
μ
PD8670ACY AND
μ
PD3747D
Part
Item
μ
PD8670ACY
μ
PD3747D
Referential
Page
Features
Output type
2 outputs out of phase or in phase
2 outputs in phase only
1
Sensitivity (Daylight
color fluorescent lamp)
TYP. 17 V/lx
s
TYP. 19 V/lx
s
Ordering information
Package
32-pin plastic DIP
22-pin ceramic DIP (CERDIP)
Pin configuration
Input clock
4
Block diagram
3
Application circuit
φ
CP1,
φ
CP2 separated,
φ
R1,
φ
R2 separated,
φ
2L1,
φ
2L2 separated
(Output: in/out of phase)
φ
CP common,
φ
R common,
φ
2L common
(Output: in phase)
21
example
Equivalent circuit Tr.
2SA1206, 2SC1842
2SA1005, 2SC945
Absolute maximum
ratings
Operating ambient
temperature
0 to +60°C
–25 to +55°C
5
Storage temperature
–40 to +70°C
–40 to +100°C
Recommended
operating condition
Each clock amplitude
Addition of specifications
(from 4.5 V to 5.8 V)
–
Electrical
characteristics
ADS, DSNU, DR1,
DR2
Change of specifications
–
6
R
F
TYP. 17 V/lx
s
TYP. 19 V/lx
s
RFTN
Addition of PRFTN, RFTN1,
RFTN2
Only RFTN
t
d
TYP. 13 ns
Addition of min. max.
TYP. 14 ns
σ
bit,
σ
line,
σ
shot
Addition of condition (t6)
–
Input pin capacitance Capacitance
Change of specification
Addition of note
–
7
Timing chart
Operation
Addition of out-of-phase
timing chart
–
8, 9
t6
MIN. 5 ns
MIN. 0 ns
12, 14
t10
MIN. 0 ns
MIN. t3
t13, t16, t17
MAX. 10000 ns
–
14
Close point
–
Change of specifications
–
15
Definitions
V
OS
, RFTN
Additional item
–
19
Recommended
soldering condition
Partial heating method
350°C or blow, 3 seconds or less
300°C or blow, 3 seconds or less
24
Package drawing
Package
32-pin plastic DIP
22-pin ceramic DIP (CERDIP)
23
Cap
Plastic cap 0.7t
Glass cap 0.7t
From CCD to bottom
of package
2.45
±
0.3 mm
2.38
±
0.3 mm
From CCD to top of
cap
(2.0) mm
(1.95) mm
Remark
T
A
= +25°C, V
OD
= 12 V