
User’s Manual U15400EJ4V0UD
19
LIST OF FIGURES (4/6)
Figure No.
Title
Page
11-1
Block Diagram of Serial Interface 20 ............................................................................................................188
11-2
Block Diagram of Baud Rate Generator 20 ..................................................................................................189
11-3
Format of Serial Operation Mode Register 20 ..............................................................................................191
11-4
Format of Asynchronous Serial Interface Mode Register 20.........................................................................192
11-5
Format of Asynchronous Serial Interface Status Register 20 .......................................................................194
11-6
Format of Baud Rate Generator Control Register 20....................................................................................195
11-7
Format of Asynchronous Serial Interface Transmit/Receive Data ................................................................205
11-8
Asynchronous Serial Interface Transmission Completion Interrupt Timing...................................................207
11-9
Asynchronous Serial Interface Reception Completion Interrupt Timing ........................................................208
11-10
Receive Error Timing ....................................................................................................................................209
11-11
3-Wire Serial I/O Mode Timing .....................................................................................................................215
12-1
Block Diagram of Serial Interface 1A0 ..........................................................................................................218
12-2
Format of Serial Operation Mode Register 1A0 ............................................................................................221
12-3
Format of Automatic Data Transmit/Receive Control Register 0 ..................................................................222
12-4
Format of Automatic Data Transmit/Receive Interval Specification Register 0 .............................................223
12-5
3-Wire Serial I/O Mode Timing .....................................................................................................................228
12-6
Circuit of Switching in Transfer Bit Order......................................................................................................230
12-7
Basic Transmit/Receive Mode Operation Timings ........................................................................................237
12-8
Basic Transmit/Receive Mode Flowchart......................................................................................................238
12-9
Buffer RAM Operation in 6-Byte Transmission/Reception (in Basic Transmit/Receive Mode).....................239
12-10
Basic Transmit Mode Operation Timings ......................................................................................................241
12-11
Basic Transmit Mode Flowchart....................................................................................................................242
12-12
Buffer RAM Operation in 6-Byte Transmission (in Basic Transmit Mode) ....................................................243
12-13
Repeat Transmit Mode Operation Timing .....................................................................................................245
12-14
Repeat Transmit Mode Flowchart.................................................................................................................246
12-15
Buffer RAM Operation in 6-Byte Transmission (in Repeat Transmit Mode)..................................................247
12-16
Automatic Transmission/Reception Suspension and Restart .......................................................................249
12-17
Interval Time of Automatic Transmission/Reception.....................................................................................250
13-1
Correspondence with LCD Display RAM ......................................................................................................252
13-2
LCD Controller/Driver Block Diagram ...........................................................................................................253
13-3
Format of LCD Display Mode Register 0 ......................................................................................................254
13-4
Format of LCD Clock Control Register 0 ......................................................................................................255
13-5
Relationship Between LCD Display Data Memory Contents and Segment/Common Outputs
(When Using S16 to S27) .............................................................................................................................256
13-6
Common Signal Waveforms .........................................................................................................................258
13-7
Voltages and Phases of Common and Segment Signals..............................................................................258
13-8
Three-Time Slot LCD Display Pattern and Electrode Connections ...............................................................259