參數(shù)資料
型號(hào)： UPD78F0361GK(S)-UET-A
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP64
封裝： 12 X 12 MM, LEAD FREE, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 2/32頁(yè)
文件大?。?/td> 3542K
代理商： UPD78F0361GK(S)-UET-A
Preliminary User’s Manual U17734EJ1V0UD
10
3.3 Instruction Address Addressing................................................................................................. 56
3.3.1 Relative addressing......................................................................................................................... 56
3.3.2 Immediate addressing..................................................................................................................... 57
3.3.3 Table indirect addressing ................................................................................................................ 58
3.3.4 Register addressing ........................................................................................................................ 58
3.4 Operand Address Addressing .................................................................................................... 59
3.4.1 Implied addressing .......................................................................................................................... 59
3.4.2 Register addressing ........................................................................................................................ 60
3.4.3 Direct addressing ............................................................................................................................ 61
3.4.4 Short direct addressing ................................................................................................................... 62
3.4.5 Special function register (SFR) addressing ..................................................................................... 63
3.4.6 Register indirect addressing............................................................................................................ 64
3.4.7 Based addressing ........................................................................................................................... 65
3.4.8 Based indexed addressing .............................................................................................................. 66
3.4.9 Stack addressing............................................................................................................................. 67
CHAPTER 4 PORT FUNCTIONS ........................................................................................................... 68
4.1 Port Functions .............................................................................................................................. 68
4.2 Port Configuration........................................................................................................................ 69
4.2.1 Port 0 .............................................................................................................................................. 70
4.2.2 Port 1 .............................................................................................................................................. 72
4.2.3 Port 2 .............................................................................................................................................. 77
4.2.4 Port 3 .............................................................................................................................................. 79
4.2.5 Port 12 ............................................................................................................................................ 81
4.3 Registers Controlling Port Function .......................................................................................... 83
4.4 Port Function Operations ............................................................................................................ 87
4.4.1 Writing to I/O port ............................................................................................................................ 87
4.4.2 Reading from I/O port...................................................................................................................... 87
4.4.3 Operations on I/O port..................................................................................................................... 87
4.5 Settings of Port Mode Register and Output Latch When Using Alternate Function............. 88
CHAPTER 5 CLOCK GENERATOR ...................................................................................................... 90
5.1 Functions of Clock Generator..................................................................................................... 90
5.2 Configuration of Clock Generator .............................................................................................. 91
5.3 Registers Controlling Clock Generator......................................................................................93
5.4 System Clock Oscillator ............................................................................................................ 102
5.4.1 X1 oscillator....................................................................................................................................102
5.4.2 XT1 oscillator .................................................................................................................................102
5.4.3 When subsystem clock is not used ................................................................................................105
5.4.4 Internal high-speed oscillator .........................................................................................................105
5.4.5 Internal low-speed oscillator...........................................................................................................105
5.4.6 Prescaler ........................................................................................................................................105
5.5 Clock Generator Operation ....................................................................................................... 106
5.6 Controlling Clock........................................................................................................................ 109
5.6.1 Example of controlling high-speed system clock............................................................................109
5.6.2 Example of controlling internal high-speed oscillation clock...........................................................112
5.6.3 Example of controlling subsystem clock.........................................................................................114
5.6.4 Example of controlling internal low-speed oscillation clock ............................................................116
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