- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383983 > UPD72042GT (NEC Corp.) LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL PDF資料下載
參數(shù)資料
| 型號： | UPD72042GT |
| 廠商： | NEC Corp. |
| 英文描述： | LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL |
| 中文描述： | LSI器件間設備BusTM（IEBusTM）協(xié)議控制 |
| 文件頁數(shù)： | 20/92頁 |
| 文件大?。?/td> | 373K |
| 代理商： | UPD72042GT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
μ
PD72042
20
Data Sheet S14870EJ1V0DS00
(3) Reading a lock address (control bits: 4H, 5H)
When a lock address read operation (4H, 5H) is specified, the address (12 bits) of the master unit that
issued the lock instruction is read in one-byte form, as shown below.
Fig. 2-3 Lock Address Format
(4) Locking and unlocking (control bits: Locking (3H, AH, BH), unlocking (6H))
The lock function is used to enable the transfer a message using more than one communication frame.
When locked, a unit cannot receive data from other than the unit that requested the lock.
Locking and unlocking are performed as follows:
1
Locking
The master unit can lock the slave unit by specifying the lock with the corresponding control bits (3H, AH,
BH). In this case, when the transmission or reception of acknowledge bit 0 for the data-length field has been
completed, but the communication frame is then terminated before transmission or reception of as many data
bytes as are specified by the data-length bits is completed, the slave unit is locked. At this time, the bit
indicating the lock status (bit 2) in the slave status byte is set to 1.
2
Unlocking
The master unit can unlock a locked slave unit when the control bits specify locking (3H, AH, or BH) or
unlocking (6H). The slave unit is unlocked once as many data bytes as are specified by the data-length bits
have been transmitted or received within one communication frame. At this time, the bit indicating the lock
status (bit 2) in the slave status byte is reset to 0.
For broadcast, locking or unlocking is not performed.
Caution When a locked unit is to be unlocked by the unit itself, hardware reset or software reset must
be performed. (The lock status can be checked by referring to the contents of the LOR2 register.)
MSB
LSB
Control bits : 4H
Control bits : 5H
Low-order 8 bits
Undefined
High-order 4 bits
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| uPD72107GC-3B9 | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
| UPD72107 | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
| uPD72107CW | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
| uPD72107L | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
| UPD75008 | 4-BIT SINGLE-CHIP MICROCOMPUTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD72042GT(A) | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD720902AF5-667-JF2-E3-A | 功能描述:IC ADVANCED MEMORY BUFFER D1 RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標準包裝:90 系列:- 應用:PCI 至 PCI 橋 接口:PCI 電源電壓:3 V ~ 3.6 V 封裝/外殼:257-LFBGA 供應商設備封裝:257-BGA MICROSTAR（16x16） 包裝:托盤 安裝類型:表面貼裝 產(chǎn)品目錄頁面:882 (CN2011-ZH PDF) 其它名稱:296-19316 |
| UPD72255YF1-GA5-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7225G | 制造商:Panasonic Industrial Company 功能描述:IC |
| UPD7225GB-3B7(A) | 制造商:Renesas Electronics Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。