參數(shù)資料
型號(hào)： UPD703130GC-8EU
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT
中文描述： 馬鞍山集成電路
文件頁(yè)數(shù)： 10/72頁(yè)
文件大?。?/td> 601K
代理商： UPD703130GC-8EU
Preliminary Data Sheet U15390EJ1V0DS
10
μ
PD703130
(2/2)
Pin Name
I/O
Function
Alternate Function
LCAS
Output
Column address strobe signal output for DRAM’s lower data
P90/LWR
UCAS
Output
Column address strobe signal output for DRAM’s higher data
P91/UWR
RAS3
P83/CS3
RAS4
P84/CS4/IOWR
RAS5
Output
Row address strobe signal output for DRAM
P85/CS5/IORD
BCYST
Output
Strobe signal output indicating start of bus cycle
P94
CS0
P80
CS3
P83/RAS3
CS4
P84/RAS4/IOWR
CS5
Output
Chip select signal output
P85/RAS5/IORD
WAIT
Input
Control signal input for inserting waits in bus cycle
PX6
IOWR
Output
DMA write strobe signal output
P84/RAS4/CS4
IORD
Output
DMA read strobe signal output
P85/RAS5/CS5
DMARQ0 to
DMARQ3
Input
DMA request signal input
P04/INTP100 to
P07/INTP103
DMAAK0 to
DMAAK3
Output
DMA acknowledge signal output
P14/INTP110 to
P17/INTP113
HLDAK
Output
Bus hold acknowledge output
P96
HLDRQ
Input
Bus hold request input
P97
ANI0 to ANI3
Input
Analog input to A/D converter
P70 to P73
NMI
Input
Non-maskable interrupt request input
P20
CLKOUT
Output
System clock output
PX7
CKSEL
Input
Input for specifying clock generator’s operation mode
–
MODE0,
MODE2
Input
Specify operation modes
–
RESET
Input
System reset input
–
X1
Input
–
X2
–
Connecting resonator for system clock. Input is via X1 when using an
external clock.
–
AV
REF
Input
Reference voltage input for A/D converter
–
AV
DD
–
Positive power supply for A/D converter
–
AV
SS
–
Ground potential for A/D converter
–
CV
DD
–
Positive power supply for dedicated clock generator
–
CV
SS
–
Ground potential for dedicated clock generator
–
V
DD
–
Positive power supply (power supply for internal units)
–
HV
DD
–
Positive power supply (power supply for external pins)
–
V
SS
–
Ground potential
–
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