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CHAPTER 19 INSTRUCTION SET
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241
<4>
Caution
The data buffer is configured in 16 bits. However, the number of bits accessed differs depending on
the peripheral hardware. For example, if the GET instruction is executed to a peripheral hardware
register with a valid bit length of 8 bits, the contents of the peripheral hardware register are stored to
the low-order 8 bits (DBF1, DBF0) of the data buffer DBF.
(12)PUT p, DBF
Put data buffer peripheral
<1>
OP code
<2>
Function
(p)
←
DBF
Stores the data buffer DBF contents to peripheral hardware register.
DBF is a 16-bit area of addresses 0H through 0FH of BANK0 of the data memory regardless of the value
of the bank register.
Data buffer
Actual bits
b
7
b
0
GET
b
7
b
0
DBF0
DBF1
DBF2
Retained
DBF3
Retained
Peripheral
hardware
register
00111
1010
p
L
10
8
7
4
3
0
p
H
0
1
2
3
4
5
6
7
0
F
1
2
3
4
5
6
7
8
9
A
B
C
D
E
R
Column address
Bank 0
DBF
1
2
System register
SIOSFR
12H
Peripheral
hardware
register