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- vii -
LIST OF FIGURES (1/3)
Figure No.
Title
Page
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
Program Counter...................................................................................................................................... 17
Value of the Program Counter after Instruction Execution .................................................................... 18
Value in the Program Counter after Reset ............................................................................................. 18
Value in the Program Counter during Execution of a BR addr Instruction ........................................... 18
Value in the Program Counter during Execution of an Indirect Branch Instruction .............................. 19
Value in the Program Counter during Execution of a CALL addr.......................................................... 19
Value in the Program Counter during Execution of an Indirect Subroutine Call .................................. 20
Value in the Program Counter during Execution of a Return Instruction .............................................. 20
4-1
4-2
4-3
Program Memory Map for the
μ
PD17134A Subseries........................................................................... 23
CALL addr Instruction .............................................................................................................................. 26
Table Reference (MOVT DBF, @AR)...................................................................................................... 27
5-1
5-2
5-3
5-4
5-5
Data Memory Configuration..................................................................................................................... 31
System Register Configuration................................................................................................................ 32
Data Buffer Configuration ........................................................................................................................ 32
General Register (GR) Configuration...................................................................................................... 33
Port Register Configuration ..................................................................................................................... 33
6-1
Stack Configuration.................................................................................................................................. 35
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
7-9
7-10
7-11
7-12
7-13
7-14
7-15
7-16
7-17
7-18
Allocation of System Register in Data Memory...................................................................................... 41
System Register Configuration................................................................................................................ 42
Address Register Configuration .............................................................................................................. 43
Address Register Used as a Peripheral Circuit...................................................................................... 44
Window Register Configuration............................................................................................................... 45
Example of Window Register Operation................................................................................................. 45
Bank Register Configuration ................................................................................................................... 46
Index Register Configuration................................................................................................................... 47
Modification of Data Memory Address by Index Register and Memory Pointer ................................... 48
Operation Example When IXE = 0 and MPE = 0 ................................................................................... 50
Operation Example When IXE = 0 and MPE = 1 ................................................................................... 52
Operation Example When IXE = 1 and MPE = 0 ................................................................................... 54
Operation Example When IXE = 1 and MPE = 0 ................................................................................... 55
Operation Example When IXE = 1 and MPE = 0 (Array Processing) ................................................... 56
General Register Pointer Configuration.................................................................................................. 57
General Register Configuration............................................................................................................... 58
Program Status Word Configuration ....................................................................................................... 59
Outline of Functions of the Program Status Word ................................................................................. 60
8-1
General Register Configuration............................................................................................................... 68