參數(shù)資料
型號: UPD178P018AKK-T
廠商: NEC Corp.
元件分類: 圓形連接器
英文描述: Circular Connector; No. of Contacts:66; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:18; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:18-35 RoHS Compliant: No
中文描述: 8位單片機
文件頁數(shù): 28/60頁
文件大小: 325K
代理商: UPD178P018AKK-T
28
μ
PD178P018A
AC CHARACTERISTICS
(1) BASIC OPERATION (T
A
= –40 to +85
°
C, V
DD
= 3.5 to 5.5 V)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Cycle time
(Minimum instruction
T
CY
f
XX
= f
X
/2
Note 1
, f
X
= 4.5-MHz operation
0.89
14.22
μ
s
f
XX
= f
X
Note 2
,
f
X
= 4.5-MHz operation
4.5
V
DD
5.5 V
0.44
7.11
μ
s
execution time)
3.5
V
DD
< 4.5 V
0.89
7.11
μ
s
TI1, TI2 input
frequency
f
TI
4.5
V
DD
5.5 V
0
4.5
MHz
3.5 V
V
DD
< 4.5 V
0
275
kHz
TI1, TI2 input high/
low-level width
t
TIH
,
4.5
V
DD
5.5 V
111
ns
t
TIL
3.5 V
V
DD
< 4.5 V
1.8
μ
s
Interrupt input high/
T
INTH
,
INTP0
8/f
sam
Note 3
μ
s
low-level width
T
INTL
INTP1 to INTP6
10
μ
s
RESET low-level
width
t
RSL
10
μ
s
Notes
1.
When the Oscillation Mode Selection register (OSMS) is set to 00H.
2.
When OSMS is set to 01H.
3.
In combination with bits 0 (SCS0) and 1 (SCS1) of the Sampling Clock Select register (SCS),
selection of f
sam
is possible among f
XX
/2
N
, f
XX
/32, f
XX
/64, and f
XX
/128 (when N = 0 to 4).
Remarks 1.
f
XX
: System clock frequency (f
X
or f
X
/2)
2.
f
X
: System clock oscillation frequency
T
CY
vs V
DD
(when system clock f
XX
is operating at f
X
/2)
T
CY
vs V
DD
(when system clock f
XX
is operating at f
X
)
C
C
μ
s
C
C
μ
s
60
10
2.0
1.0
0.5
0.4
0
1
2
3
4
5
6
Power Supply Voltage V
DD
[V]
Power Supply Voltage V
DD
[V]
60
10
2.0
1.0
0.5
0.4
0
1
2
3
4
5
6
Operation
Guaranteed
Range
Operation
Guaranteed
Range
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