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參數(shù)資料
| 型號： | UPD178023 |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 37/56頁 |
| 文件大?。?/td> | 261K |
| 代理商： | UPD178023 |
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37
μ
PD178023, 178024
Data Sheet U14126EJ1V0DS00
DC Characteristics (T
A
= –40 to +85
°
C, V
DD
= 3.5 to 5.5 V) (2/2)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Low-level input
leakage current
I
LIL
P00-P06, P10-P15,
P30-P37, P40-P47,
P50-P57, P60-P67,
P70-P77, P120-P125,
RESET
V
IN
= 0 V
–3
μ
A
Output off
leakage current
I
LOH1
P130-P132
V
OUT
= 15 V
–3
μ
A
I
LOL1
P130-P132
V
OUT
= 0 V
3
μ
A
I
LOH2
P76, P77
(at N-ch open drain I/O)
V
OUT
= V
DD
–3
μ
A
I
LOL2
P76, P77
(at N-ch open drain I/O)
V
OUT
= 0 V
3
μ
A
I
LOH3
EO0, EO1
V
OUT
= V
DD
–3
μ
A
I
LOL3
EO0, EO1
V
OUT
= 0 V
3
μ
A
Supply current
Note
I
DD1
When CPU is operating and PLL is stopped.
Sine wave input to X1 pin
At f
X
= 4.5 MHz
V
IN
= V
DD
4.0
20
mA
I
DD2
In HALT mode with PLL stopped.
Sine wave input to X1 pin
At f
X
= 4.5 MHz
V
IN
= V
DD
0.35
0.70
mA
Data retention
voltage
V
DDR1
When crystal resonator is oscillating
3.5
5.5
V
V
DDR2
When crystal oscillation is
stopped
Power-failure detection
function
2.2
V
V
DDR3
Data memory retained
2.0
V
Data retention
current
I
DDR1
When crystal oscillation is
stopped
T
A
= 25
°
C,
V
DD
= 5 V
2.0
4.0
μ
A
I
DDR2
2.0
20
μ
A
Note
Excluding AV
DD
current and V
DD
PLL current.
Remarks 1.
f
X
: System clock oscillation frequency
2.
Unless otherwise specified, the characteristics of a multiplexed pin are the same as those of the
corresponding port pin.
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