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參數(shù)資料
| 型號： | UPC2533GS-02 |
| 元件分類： | 接收器 |
| 英文描述： | AM, AUDIO SINGLE CHIP RECEIVER, PDSO36 |
| 封裝： | 0.300 INCH, PLASTIC, SSOP-36 |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 240K |
| 代理商： | UPC2533GS-02 |
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17
PC2533
2.7
Station Detector Circuit Block
Fig. 2-7 Station Detector Circuit Block
The configration station detector (SD) circuit block is shown in Fig. 2-7.
The SD circuit stops scanning or seeking when a broadcast wave is received when auto scanning or seek tuning.
Since the
PC2533 has two outputs (DC high/low signal (open collector) and AC IF signal (f = 450 kHz)), it can be
used according to DTS (digital tuning system) type. Input the SD request signal from DTS to pin 5.
The SD sensitivity setting methods of the
PC2533GS-01 and PC2533GS-02 differ.
With the
PC2533GS-01, SD sensitivities in the IF counter output system and in the high/low output system are
set by external resistor between pin 7 and GND and by external resistor between pin 9 and GND.
With the
PC2533GS-02, SD sensitivities in both the IF counter output system and high/low output system are set
by external resistor between pin 7 and GND (refer to Fig. 2-6).
Table 2-1 SD Sensitivity Setting Examples
Value of Resistor between Pin 9 or Pin 7 and GND
SD Sensitivity (AC, DC)
51 k
27 dB
V
24 k
29 dB
V
10 k
33 dB
V
Bias
circuit
Bias
circuit
+
–
+
–
+
10
5
6
8
1.0 V
ON/OFF
1.0 V
Detection comparator 1
Detection comparator 2
From signal meter
circuit (Fig. 2-6)
To time constant
switchover circuit
(Fig. 2-6)
From DTS (request)
SD output
(Active high)
SD AC output
450kHz IF input
(from T3)
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