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參數(shù)資料
| 型號： | UPC2533GS-02 |
| 元件分類： | 接收器 |
| 英文描述： | AM, AUDIO SINGLE CHIP RECEIVER, PDSO36 |
| 封裝： | 0.300 INCH, PLASTIC, SSOP-36 |
| 文件頁數(shù)： | 8/36頁 |
| 文件大?。?/td> | 240K |
| 代理商： | UPC2533GS-02 |
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16
PC2533
2.6
IF AGC Block
Fig. 2-6 IF AGC Block (for
PC2533GS-01)
IF AGC block configuration is shown in Fig. 2-6. The signal detected from pin 15 is smoothed by the capacitor
of pin 20, and its DC voltage controls the IF AGC.
The IF AGC controls the IF amplifier and MIX2. In the operation sequence, it first controls the gain of the IF amplifier,
then controls the gain of MIX2.
The signal meter circuit output (current output) is in proportion to the DC voltage smoothed by pin 20, and converted
to voltage by the external resistor of pin 7 or 9. Therefore, output voltage value and gain can be set by the value of
the external resistor. Note
Note For relation between the external resistor and the signal meter, refer to Signal meter output voltage
(adjustment by resistor between pin 9 and GND) in section 4. Characteristic Curves.
Bias
circuit
7
20
9
Q501
Q503
Q502
D501
Q504
D502
R501
5 k
R502
5 k
VCC
To MIX2 (Fig. 2-3)
To IF amp. (Fig. 2-5)
From detection circuit
(Fig. 2-5)
Signal meter circuit
Time
constant
switchover
Note
To SD circuit
(Fig. 2-7)
+
From SD circuit
(Fig. 2-7)
Note In the case of
PC2533GS-02,
the part enclosed by the
dotted line is illustrated as
shown below.
R501
5 k
R502
5 k
Voltage
limiter
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