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參數(shù)資料
| 型號(hào)： | UPC177GR-9LG-E2-A |
| 廠商： | NEC Corp. |
| 英文描述： | BIPOLAR ANALOG INTEGRATED CIRCUIT SINGLE POWER SUPPLY QUAD COMPARATORS |
| 中文描述： | 雙極模擬集成電路單電源供電四比較器 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 200K |
| 代理商： | UPC177GR-9LG-E2-A |
Data Sheet G17933EJ3V0DS
3
μ
PC177GR-9LG,
μ
PC339GR-9LG
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
V
±
V
+
MIN.
TYP.
MAX.
Unit
Power Supply Voltage (Split)
Power Supply Voltage (V
±
1
±
16
V
= GND)
+
2
+
32
V
ELECTRICAL CHARACTERISTICS
μ
PC177GR-9LG,
μ
PC339GR-9LG (T
A
= 25
°
C, V
+
=
+
5 V, V
= GND)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input Offset Voltage
V
IO
V
O
= 1.4 V, V
REF
= 1.4 V, R
S
= 0
Ω
±
1
±
5
±
5
mV
Input Offset Current
Input Bias Current
Note1
I
IO
V
O
= 1.4 V
±
50
nA
I
B
V
O
= 1.4 V
20
250
nA
Voltage Gain
Circuit Current
Note2
A
V
R
L
= 15 k
Ω
200000
I
CC
R
L
=
∞
, I
O
= 0 A
1.1
2
mA
Common Mode lnput Voltage Range
V
ICM
0
V
+
1.5
V
Output Saturation Voltage
V
OL
V
IN (
)
=
+
1 V, V
IN (
+
)
= 0 V, I
O SINK
= 4 mA
0.2
0.4
V
Output Sink Current
I
O SINK
V
IN (
)
=
+
1 V, V
IN (
+
)
= 0 V, V
O
≤
1.5 V
6
16
mA
Output Leakage Current
Pulse Response Time
Note3
I
O LEAK
V
IN (
+
)
=
+
1 V, V
IN (
)
= 0 V, V
O
= 5 V
0.1
nA
R
L
= 5.1 k
Ω
, V
RL
= 5 V,
1.6
μ
s
μ
PC177GR(5)-9LG,
μ
PC339GR(5)-9LG (T
A
= 25
°
C, V
+
=
+
5 V, V
= GND)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input Offset Voltage
V
IO
V
O
= 1.4 V, V
REF
= 1.4 V, R
S
= 0
Ω
±
1
±
5
±
2.5
mV
Input Offset Current
Input Bias Current
Note1
I
IO
V
O
= 1.4 V
±
50
nA
I
B
V
O
= 1.4 V
20
60
nA
Voltage Gain
Circuit Current
Note2
A
V
R
L
= 15 k
Ω
200000
I
CC
R
L
=
∞
, I
O
= 0 A
1.1
1.2
mA
Common Mode lnput Voltage Range
V
ICM
0
V
+
1.4
V
Output Saturation Voltage
V
OL1
V
IN (
)
=
+
1 V, V
IN (
+
)
= 0 V, I
O SINK
= 4 mA
0.2
V
V
OL2
V
IN (
)
=
+
1 V, V
IN (
+
)
= 0 V, I
O SINK
= 10 mA
1.5
V
Output Sink Current
I
O SINK
V
IN (
)
=
+
1 V, V
IN (
+
)
= 0 V, V
O
≤
1.5 V
10
16
mA
Output Leakage Current
Pulse Response Time
Note3
I
O LEAK
V
IN (
+
)
=
+
1 V, V
IN (
)
= 0 V, V
O
= 5 V
0.1
100
nA
R
L
= 5.1 k
Ω
, V
RL
= 5 V,
1.6
μ
s
Notes1.
The input bias current flows in the direction where the IC flows out because the first stage is configured with a
PNP transistor.
In addition, the value of this item is a value of when the differential amplified circuit of the input stage is
balanced. When the comparator is active, then twice the amount of current will flow to a pin with low
potential.
2.
This is a current that flows in the internal circuit. This current will flow irrespective of the channel used.
3.
This is the value when input oscillation is 100 mV and the over drive is 5 mV.
If the amount of over drive is increased then the response time can be cut down.
<R>
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