參數(shù)資料
型號: UCB1400BE
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Audio codec with touch screen controller and power management monitor
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 X 1.40 MM, PLASTIC, LQFP-48
文件頁數(shù): 36/63頁
文件大?。?/td> 674K
代理商: UCB1400BE
Philips Semiconductors
UCB1400
Audio codec with touch screen controller
and power management monitor
Product data
Rev. 02 — 21 June 2002
36 of 63
9397 750 09611
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
12.3 MIC Volume register (index 0x0E)
12.4 Record Select register (index 0x1A)
Table 15:
Register address: 0x0E; default: 0000
Bit
D15
Symbol
X
Bit
D7
Symbol
X
MIC Volume register
D14
X
D6
20dB
D13
X
D5
X
D12
X
D4
X
D11
X
D3
X
D10
X
D2
X
D9
X
D1
X
D8
X
D0
X
Table 16:
Bit
D15 - D7
D6
D5 - D0
Description of MIC Volume register bits
Symbol
Type
X
R
20dB
RW
X
R
Description
Reserved.
20 dB boost.
Reserved.
Table 17:
Register address: 0x1A; default: 0000
Bit
D15
Symbol
X
Bit
D7
Symbol
X
Record Select register
D14
X
D6
X
D13
X
D5
X
D12
X
D4
X
D11
X
D3
X
D10
SL2
D2
SR2
D9
SL1
D1
SR1
D8
SL0
D0
SR0
Table 18:
Bit
D15 - D11
D10 - D8
Description of Record Select register bits
Symbol
Type
X
R
SL2 - SL0
RW
Description
Reserved.
Left record source (000 = MIC; 100 = Line In L;
other values reserved).
Reserved.
Right record source (000 = Copy Left;
100 = Line In R; other values reserved).
When SR = 000, the right record channel copies
data from left record channel to create mono data
and gain and sample rate control can only be made
via the left channel. This mode is primarily intended
when the mono MIC input is selected at the left
channel (SL = 000).
D7 - D3
D2 - D0
X
SR2 - SR0
R
RW
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