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參數(shù)資料
| 型號(hào)： | UBA1707 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Cordless telephone, answering machine line interface(無(wú)繩電話，電話應(yīng)答機(jī)線接口) |
| 中文描述： | 無(wú)繩電話，應(yīng)答機(jī)行界面（無(wú)繩電話，電話應(yīng)答機(jī)線接口） |
| 文件頁(yè)數(shù)： | 8/36頁(yè) |
| 文件大小： | 245K |
| 代理商： | UBA1707 |
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1999 Feb 17
8
Philips Semiconductors
Product specification
Cordless telephone, answering machine
line interface
UBA1707
The DC line current flowing into the set is determined by
the exchange supply voltage (V
exch
), the feeding bridge
resistance (R
exch
), the DC resistors of the telephone line
(R
line
) and the set (R
SET
), the reference voltage (V
ref
) and
the voltage introduced by the transistor (TN
SW
) used as
line interrupter (see Fig.5). With a line current below I
low
(8 mA with Z
SET
= 619
), the internal reference voltage
(V
ref
) is automatically adjusted to a lower value. This
means that more sets can operate in parallel with DC line
voltages (excluding the polarity guard) down to 1.2 V.
At line current below I
low
, the circuit has limited transmit
and receive levels. This is called the low voltage area.
Figure 6 shows in more details how the UBA1707, in
association with some external components, manages the
line interrupter (TN
SW
external transistor).
In on-hook conditions (voltage at pin EHI is LOW), the
voltage at pin LCC is pulled-up to the supply voltage level
(V
CC
) to turn off the TP
DARL
transistor. As a result, because
of the R
PLD
resistor, the TN
SW
and TN
ON-HOOK
transistors
are switched off. The TN
ON-HOOK
transistor disconnects
the R
LVI
resistor from the LN
line terminal in order to
guarantee a high on-hook impedance.
In off-hook conditions (voltage at pin EHI is HIGH), an
operational amplifier drives (at pin LCC) the base of
TP
DARL
which forms a current amplifier structure in
association with TN
SW
. The line current flows through
TN
SW
transistor. The TN
ON-HOOK
transistor is forced into
deep saturation. A virtual ground is created at pin LVI
because of the operational amplifier. A DC current (I
LVI
) is
sourced from pin LVI into the R
LVI
resistor in order to
generate a voltage source. Thus the voltage between pin
GND and the negative line terminal (LN
) becomes:
V
CE
(TN
SW
) = R
LVI
×
I
LVI
+ V
CE
(TN
ON-HOOK
)
R
LVI
×
I
LVI
The voltage V
line
between the line terminals LN+ and LN
can be calculated as follows:
V
line
V
ref
+ R
SLPE
×
(I
line
I
ZSET
) + V
CE
(TN
SW
)
Where:
I
line
= line current
I
ZSET
= current flowing through Z
SET
.
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