參數(shù)資料
型號(hào): UAA3515A
廠商: NXP Semiconductors N.V.
英文描述: 900 MHz analog cordless telephone IC
中文描述: 900 MHz模擬無繩電話芯片
文件頁(yè)數(shù): 19/44頁(yè)
文件大小: 180K
代理商: UAA3515A
2
1
P
P
9
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7.9.1
D
ATA REGISTERS
Table 5 shows the data latches and addresses that select each of the registers; bit D15 is the MSB, this is written and loaded first.
Table 5
Data register addresses: note 1
Notes
1.
2.
3.
With a 10 k
pull-up resistor connected to pin EN or the microcontroller, guarantees that V
IH
> 0.9V
CC
for the EN signal
Undefined zone; should always be programmed with 0.
In the inactive mode programming V
REG
enable from 1 to 0 might reset all of the registers. We therefore recommend that this register be set to 1
and not to change it.
Table 6
Data register default values at power-on (undefined zones shown programmed with 0)
ADDR
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
000
SBS
VCTL[1 and 0]
ear
piece
enable
RX gain control [4 to 0]
SFS
DATA
phase
FM PLL VCO tuning [4 to 0]
001
010
011
100
RX prescaler [5 to 0]
note 2
TX prescaler [5 to 0]
CLKO
level
RX main divider [9 to 0]
reference divider [9 to 0]
TX main divider [9 to 0]
TX
mute
limiter
enable
LBD levels [2 to 0]
note 2
note 2
doubler
enable
TX gain control [4 to 0]
hard
ALC
disable
Xtal
active
RX
mute
note 2
101
V
REG
enable
(3)
PA output [2 to 0]
active modes
[1 and 0]
Xtal
high
TX
charge
pump
current
CD levels [4 to 0]
LBD
active
clock div [2 to 0]
110
RX
charge
pump
current
voltage reference
adjust [2 to 0]
test mode [2 to 0]
note 2
Xtal tuning cap [3 to 0]
ADDR
000
001
010
011
100
101
110
D15
0
0
0
0
0
0
0
D14
0
0
0
0
0
0
1
D13
0
0
0
1
0
1
0
D12
0
0
0
0
0
1
0
D11
0
0
0
0
0
0
0
D10
1
1
0
0
1
0
0
D9
1
0
0
0
1
0
1
D8
1
0
1
0
1
0
1
D7
1
1
0
1
1
0
0
D6
1
1
0
1
1
0
0
D5
0
0
0
1
0
0
0
D4
0
1
0
0
0
0
0
D3
1
1
0
0
1
1
0
D2
1
0
0
0
1
x
1
D1
1
1
0
1
0
x
1
D0
1
0
0
0
0
x
1
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