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| 型號(hào)： | U2402B-X |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PDIP18 |
| 封裝： | DIP-18 |
| 文件頁(yè)數(shù)： | 3/18頁(yè) |
| 文件大?。?/td> | 294K |
| 代理商： | U2402B-X |
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U2402B
Rev. A4, 08-Nov-99
11 (18)
Current Regulation Via Phase Control (Figure 12)
Phase Control
An internal phase control monitors the angle of current
flow through the external thyristors as shown in figure 4.
The phase control block represents a ramp generator
synchronized by mains zero cross over and a comparator.
The comparator will isolate the trigger output, Pin 1, until
the end of the half wave (figure 12) when the ramp
voltage, Vramp, reaches the control voltage level, V
i,
within a mains half wave.
Charge Current Regulation (Figure 4)
According to figure 4 the operational amplifier (OpAmp)
regulates the charge current, Ich (= 160 mV / Rsh),
average value. The OpAmp detects the voltage drop
across the shunt resistor (Rsh) at input Pin 6 as an actual
value. The actual value will then be compared with an
internal reference value (rated value of 160 mV).
The regulator’s output signal, V5, is at the same time the
control signal of the phase control, V
i (Pin 4). In the
adjusted state, the OpAmp regulates the current flow
angle through the phase control until the average value at
the shunt resistor reaches the rated value of 160 mV.
The corresponding evaluation of capacitor CR at the
operational amplifier (regulator) output determines the
dynamic performance of current regulation.
Internal
zero pulse
Current flow angle
6V
0ms
10ms
20ms
30ms
100mV
fmains = 50 Hz
Vsync
(Pin 18)
Ramp
voltage
(Pin 17
)
Vi
Trigger
output
(Pin 1)
Figure 12. Phase control function diagram
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