參數(shù)資料
型號: TVP6000CPFP
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL ENCODER, PQFP80
封裝: POWER, PLASTIC, TQFP-80
文件頁數(shù): 8/57頁
文件大?。?/td> 268K
代理商: TVP6000CPFP
2–4
The slave address consists of 7 bits of address along with 1 bit of read/write information as shown in
Figures 2–4 and 2–5. For the TVP6000, the possible slave addresses (including the read/write bit) are 0x40
or 0x42 for write cycles or 0x41 and 0x43. Refer to Table 2–7 for additional base address information.
S
Slave Address
W
Sub Address
A
Data
A
P
A
Data
A
From Transmitter
From Receiver
A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
Figure 2–4. I2C Write Cycle
A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
R = Read
S
Slave Address
W
A
P
A
Transmitter
Receiver
Sub Address
S
Slave Address
R
A
P
A
Data
A
Data
Transmitter
Receiver
Figure 2–5. I2C Read Cycle
2.3
Data Manager
The data manager resides at the very beginning of the processing pipeline. It receives the Y Cb Cr pixel data
from the pixel bus and converts it to its internal YUV representation. Register F_CONTROL at subaddress
3A and the SCN bit of the SCM register at subaddress 90 define the function of the data manager.
The data manager can receive data on either an 8-bit or 16-bit video port. In the 8-bit format, it receives data
at port VP1 or VP2 (both 8-bits wide) depending on register bit FMT2, at every rising edge of LLC if scan
conversion is disabled, and at every (rising and falling) edge of LLC if scan conversion is enabled. In the
16-bit format, it receives luminance information on the VP1 port and chrominance information on the VP2
port, at alternate rising edges of LLC (qualified by CREF) if scan conversion is disabled, or at every rising
edge of LLC if scan conversion is enabled. Additionally, the data manager can generate pixels internally for
a 100/100 color bar if the CBAR bit is set. The Y, U, and V values for this color bar are shown in Table 2–3.
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