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參數(shù)資料
| 型號： | TVP5154APNPR |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 16/93頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO DECODER 4CH 128-HTQFP |
| 產(chǎn)品培訓模塊： | Data Converter Basics |
| 標準包裝： | 1 |
| 類型： | 視頻解碼器 |
| 應用： | 安全系統(tǒng) |
| 電壓 - 電源，模擬： | 1.8V |
| 電壓 - 電源，數(shù)字： | 1.8V，3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-TQFP 裸露焊盤 |
| 供應商設(shè)備封裝： | 128-HTQFP（14x14） |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 887 (CN2011-ZH PDF) |
| 配用： | TVP5154EVM-ND - TVP5154EVM 296-23058-ND - EVAL MODULE FOR DM642 |
| 其它名稱： | 296-23027-6 |
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F
dto +
F
ctrl
223
F
clk
www.ti.com
SLES214C – DECEMBER 2007 – REVISED SEPTEMBER 2010
6
Genlock Control and RTC
A Genlock control (GLCO) function is provided to support a standard video encoder to synchronize its
internal color oscillator for properly reproduced color with unstable timebase sources like VCRs.
The frequency control word of the internal color subcarrier digital control oscillator (DTO) and the
subcarrier phase reset bit are transmitted via the GLCO terminal. The frequency control word is a 23-bit
binary number. The frequency of the DTO can be calculated from the following equation:
(1)
where Fdto is the frequency of the DTO, Fctrl is the 23–bit DTO frequency control, and Fclk is the frequency
of the CLK.
6.1
TVP5154A Genlock Control Interface
A write of 1 to bit 4 of the chrominance control register at I2C subaddress 1Ah causes the subcarrier DTO
phase reset bit to be sent on the next scan line on GLCO. The active-low reset bit occurs seven CLKs
after the transmission of the last bit of DCO frequency control. Upon the transmission of the reset bit, the
phase of the TVP5154A internal subcarrier DCO is reset to zero.
A Genlock slave device can be connected to the GLCO terminal and uses the information on GLCO to
synchronize its internal color phase DCO to achieve clean line and color lock.
6.2
RTC Mode
Figure 6-1 shows the timing diagram of the RTC mode. Clock rate for the RTC mode is four times slower
than the GLCO clock rate. For PLL frequency control, the upper 22 bits are used. Each frequency control
bit is two clock cycles long. The active-low reset bit occurs six CLKs after the transmission of the last bit of
PLL frequency control.
Copyright 2007–2010, Texas Instruments Incorporated
Genlock Control and RTC
23
Product Folder Link(s): TVP5154A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP5154EVM | 功能描述:視頻 IC 開發(fā)工具 TVP5154 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評估:LMH1251 工作電源電壓:5 V |
| TVP5154PNP | 功能描述:視頻 IC 4Ch Lo Pwr PAL/NTSC/ SECAM Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5154PNP | 制造商:Texas Instruments 功能描述:4-Channel Video Decoder |
| TVP5154PNPG4 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK |
| TVP5154PNPR | 功能描述:視頻 IC 4Ch Lo Pwr PAL/NTSC SECAM Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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